[SI-LIST] Re: Power - Ground Swap in PCB

Yes, ADCs and DACs are best designed with tight ground coupling to
minimize Vdd noise coupling. In the case of PLLs however, it depends on
what technology the PLL is designed with. Many use ground referenced
CMOS PLLs, and the answer is exactly what Lee describes below, but if
the PLL uses Vcc referenced logic like LVPECL or designs based on
Maneatis' patents (http://www.truecircuits.com/), the Vcc plane is more
important. The highest performance PLLs I've designed with over the last
eight years have been Vcc referenced, so I've often used Vcc islands of
postitive plane fills. If you substitute "reference plane" for "logic
ground" in Lee's statement below, then in my experience it's generally
true.

--
mkp

-----Original Message-----
From: Lee Ritchey [mailto:leeritchey@xxxxxxxxxxxxx]=20
If you have any PLL circuits or other circuits that have performance
determining components like A/D or D/A converters, it is advisable to
make the first plane below those components logic ground to avoid noise
coupling from Vdd to those parts.  Most of us have such circuits. =20
 =20

------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field

or to administer your membership from a web page, go to:
http://www.freelists.org/webpage/si-list

For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field

List FAQ wiki page is located at:
                http://si-list.org/wiki/wiki.pl?Si-List_FAQ

List technical documents are available at:
                http://www.si-list.org

List archives are viewable at:     
                http://www.freelists.org/archives/si-list
or at our remote archives:
                http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
                http://www.qsl.net/wb6tpu
  

Other related posts: