[SI-LIST] Post Layout Signal Integrity Analysis

Hello Experts,

 

As part of our design process, we conducted a pre-layout analysis and 
simulations.

Using the results, we have concluded about the traces length, width, topology 
and so.

We used this data to constrain the layout (we are using ALLEGRO).

For the most part, we used HSPICE for the SI simulations.

 

Now we are at the point that the layout is about to be ended, and we seek a 
method to perform a post-layout simulations.

1. Does anyone now of a way to combine the HSPICE and the ALLEGRO?

2. Does anyone have any recommendations at all for what to do or not to do?

 

I appreciate your time and knowledge.



Thanks 



Gil Gafni


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