[SI-LIST] Pk-Pk jitter

>     The vendor often provides PK to PK jitter parameter of PLL, but as
> we know, a reference clock on board will be feed to PLL via ASIC
> package and a input IO buffer, so we how to do simulation to get
> reference clock jitter requirement. could you help to give simulation
> methodology? thanks! 

What does Peak-to-peak mean in this context?

If the distribution is Gausian (which is the usual assumption), then the 
tails go on forever.  It's just a matter of how long you wait.

Is there an implied cutoff at 6 sigma or something like that?  I think that 
would make Pk-Pk a useful description.

Is the typical distribution actually Gaussian?  All sorts of things get more 
interesting if it isn't quite Gaussian.


-- 
These are my opinions, not necessarily my employer's.  I hate spam.



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