[SI-LIST] Re: Phase/Frequency Detector!
- From: Paul Levin <levinpa@xxxxxxxxxxxxx>
- To: steve weir <weirsp@xxxxxxxxxx>
- Date: Wed, 20 Aug 2003 13:17:30 -0700
Dear Steve,
There are several different varieties of PFD, each with their own
idiosyncrasies.
The MC4044 was a charge pump, and as it pumped during the phase error
period, there was the possibility of metastability and/or dead band.
To beat this, many designs used a bleeder resistor to draw some charge
off of the capacitor. Thus, while the system was not locked at exactly
quadrature, the system was not in the dead band region, either. The closer
you were to dead band, the less energy you had to filter out to prevent
phase modulation of the VCO.
Today there are some charge pump PFD designs that follow the phase error
pulse with a fixed duration pulse of a specific polarity; this accomplishes
the same goal as the old bleeder resistor trick.
The one I described could have metastability in its frequency detect
regions, but once it locked, the real PD signals were almost perfectly
in quadrature in order to have a square wave coming out of the XOR. There
was no danger of dead band, but there was a lot of energy at the PD
frequency that needed filtering so as to prevent phase modulation of the
VCO.
Many PFD designs would divide both the ref and divided VCO by two in
order to ensure that the two inputs were symmetrical; this was especially
important for designs whose phase detector portion ended up being XOR.
This resulted in the apparent expansion of the phase detection range.
You might want to look at the data sheet for Analog Devices' old 200 MHz
PFD, the AD9901. There you will find the divide by two and no dead band.
Regards,
Paul
_______________
steve weir wrote:
> Partha,
>
> The old Motorola MC4044 is a classic implementation of a PFD and the
> documentation includes a state diagram that closely follows Paul's
> description of the frequency locking function. However his description
> of the behavior for less than one cycle phase error appears misleading
> to me. An XOR PD has a detection range of +/- pi/2, whereas a PFD has a
> range of +/- 2pi where it saturates at either limit as it must in order
> to indicate frequency difference. There are a number of good books on
> the subject that go into more detail, including a very accessible title
> from Ron Best.
>
> BTW, all is not wine and roses with PFD's. Common implementations are
> subject to timing hazards and/or metastability problems. Sometimes this
> is true even for implementations advertised as free of metastability
> problems such as an appnote that Transwitch has had out for a few years.
>
> In addition, all PFD's that I know of have some amount of dead-band at
> zero error, which is usually chosen as zero phase offset. That
> dead-band results in uncontrolled phase wander bounded by the width of
> the dead-band. Two approaches to deal with this problem are:
>
> 1. Minimize the width of the dead-band, and
> 2. Intentionally offset the loop with a static phase error to lock just
> outside the dead-band.
>
> 2. is commonly implemented by drawing some bias current through a
> resistor. You will find this noted in many of the clock PLL chip app
> notes from MOT, ICD, etc.
>
> Whether these issues are of concern depends on the application. The
> dead-band is measured in radians of the phase detector frequency, so
> with a frequency multiplier application, a "small" dead band can result
> in large phase offsets at the VCO output. If your application is a
> radio, this can be a significant issue.
>
> If you are contemplating an FPGA implementation in Xilinx, I have a PFD
> that may be useful to you as it is unconditionally stable, and typically
> limits the dead-band down to a few 10's of ps.
>
> Regards,
>
>
> Steve.
> At 11:45 PM 8/19/2003 -0700, Paul Levin wrote:
>
>> Dear Partha,
>>
>> As you indicated, with a phase detector all one knows
>> is the phase error. Whether that is a voltage resulting
>> from pulse width modulation or a voltage resulting from
>> charge pumps, that is all you know. In either case, if
>> the frequencies are way off, you get a sinusoidal varying
>> voltage whose average voltage is zero (give or take the
>> offset.) This gives you no information as to which way to
>> move the VCO. That is why a straight phase detector has
>> a limited acquisition range; a PLL based on a phase detector
>> must be able to "catch" the frequency during a fraction
>> of a beat period.
>>
>> On the other hand, a phase-frequency detector gives you
>> information about which of the two frequencies is higher.
>> When the two frequencies are way off, the output voltage,
>> however created, will have a real dc content indicating
>> which way the VCO should move to get closer. As the two
>> frequencies get closer together, the PFD reverts to being
>> a phase detector, so you can phase-lock the loop.
>>
>> The simplest way of thinking of a PFD is to imagine a two
>> bit up-down counter. Every time you get a reference pulse,
>> the counter moves one way (let's say up), and every time
>> you get a VCO pulse, the counter moves the other way (call
>> this down.) This counter also saturates at 00 and 11 so
>> that if the counter is 00 and you get a VCO pulse, the
>> counter will remain at 00 or if the counter is 11 and you
>> get a reference pulse, the counter will remain at 11. The
>> PFD output is the more significant bit. If you get two
>> reference pulses in a row, the VCO is too slow and you
>> want to speed it up. Since the counter now oscillates
>> between 10 or 11, and the MSB is a solid 1. Thus, the VCO
>> is driven to a higher frequency. Once the VCO gets high
>> enough (and actually just a bit too high,) there will be
>> two VCO pulses in a row, and the counter will settle into
>> a pattern between 01 and 10. Since the MSB is now oscillating,
>> you have the equivalent of an XOR output between the two
>> signals, i.e., a classic phase detector.
>>
>> Hope that this helps.
>>
>> Regards,
>>
>> Paul
>> ____________________
>>
>> Parthasarathy Sampath wrote:
>>
>> > Hi All,
>> > Whats the difference between Phase detector and
>> > Phase/Freq Detector?
>> >
>> > Why is PFD advantageous to PF?
>> > - Normally PF has low acquisition range limited by
>> > usage of Low Pass Filter. In PFD we use charge pump
>> > instead of LPF. Is that the main reason?
>> >
>> > Thanks in Advance,
>> >
>> > Regards,
>> > Partha!
>> >
>> > __________________________________
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>>
>> --
>> Paul Levin
>> Senior Principal Engineer
>> Xyratex Storage Systems
>>
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>
>
>
>
--
Paul Levin
Senior Principal Engineer
Xyratex Storage Systems
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