[SI-LIST] Re: PCIe Gen2 Insertion Loss Budget

Hello Stefan,
The insertion loss for PCI Gen 1 is a bit more complicated since it is 
frequency dependent with the de-emphasis value of the the TX (roughly 500mv pp) 
used for lower frequency (less activity) and the full TX (as stated 800mv pp)  
used for higher frequency (active) compared against the 175mv RX min value you 
stated.
For PCI Gen 2 I have not seen an expicit insertion loss spec stated, instead 
they spec out return loss for both TX and RX similar to above with as you 
mentioned the 120mv min RX value.  
Please take a look at the PCI_Express_Base_r2.1_06Jan09 doc which should have 
more information.

Regards,
-Jory





________________________________
From: Stefan Milnor <stefan.milnor@xxxxxxxxxxxxxx>
To: si-list@xxxxxxxxxxxxx
Sent: Monday, January 19, 2009 2:05:25 AM
Subject: [SI-LIST] PCIe Gen2 Insertion Loss Budget

SI Experts:

What is the insertion loss budget for PCI Express Gen 2?

For Gen 1, it is clearly -13.2 dB  (i.e. 20 * log [175 / 800] ) and is stated 
as such in the PCI SIG spec.

For Gen 2, the receiver limits are lowered from 175 mV to 120 mV, the 
transmitter min remains at 800 mV. This would lead to a -16.5 dB loss budget. 
But the PCI SIG spec does not state this. and various application notes refer 
to the Gen 2 loss budget as being the same as for Gen 1.

Enlighten me please!



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