[SI-LIST] PCIe Gen2 Insertion Loss Budget

SI Experts:
 
What is the insertion loss budget for PCI Express Gen 2?
 
For Gen 1, it is clearly -13.2 dB  (i.e. 20 * log [175 / 800] ) and is stated 
as such in the PCI SIG spec.
 
For Gen 2, the receiver limits are lowered from 175 mV to 120 mV, the 
transmitter min remains at 800 mV. This would lead to a -16.5 dB loss budget. 
But the PCI SIG spec does not state this. and various application notes refer 
to the Gen 2 loss budget as being the same as for Gen 1.
 
Enlighten me please!
 


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