[SI-LIST] Re: PCI and Spread Spectrum Clocking

I am also concerned with devices running off of spread spectrum
clocks.  In my application I recieve serial data with SERDES and 
clock it through a Virtex FPGA (using the DCM).

I took the approach of calculating the equivalent jitter resulting
from a triangular SSC modulation, expressed as pS of period change 
on consecutive periods.   For example, in PCI Express, 
I calculated .021 pS as the quivalent jitter.  This seems 
quite small.

Is this a valid method for looking at spread spectrum compatibility?

Paul Taddonio
Product Design Engineer
paul.taddonio@xxxxxxxxxxxxxx

(posted from my home email address because my at-work ISP
is apparently blacklisted as a spammer)



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