[SI-LIST] Re: PCI Bus Routing

Douglas:
I do not use an IBIS-compatible simulator; therefore, I generated my own 
SPICE-based equivalent topology to accommodate different source and sink 
resistors, voltage-dependent chip capacitance loading, and VCC-dependent slew 
rates to 
match the PCI Specification limits. I've also added time delays and other 
refinements. This model structure can be tailored to match any vendor's 
published 
IBIS model data to assess other than worst-case specification performance 
limits.

Since I am considering publishing a paper on this modeling technique, I 
consider the details proprietary at this point in time. Otherwise, I would 
forward 
the details to you.

Developing your own models will give you better insight into the device 
operations (and limitations) anyway. It's a good exercise.

Mike

Michael L. Conn
Owner/Principal Consultant
Mikon Consulting

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