[SI-LIST] Re: PCB solder current carrying capacity

These slides discuss the issues with solder.
http://www.sematech.org/meetings/archives/other/20031027/TRC%202003_10_Tu.pdf

On the pentium 4 package intel used a maximum current density of 3.3e4 
A/cm2 and a maximum local temperature of 120C as their design target, 
based on reliability studies.



Gumaste, Vijaylaxmi wrote:
> Have you seen any electro-migration failures at the interface between Cu-pad 
> to solder intermetallics?
>
>
>
> -Vijaya
>
>
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On 
> Behalf Of Doug Brooks
> Sent: Tuesday, July 21, 2009 4:13 PM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: PCB solder current carrying capacity
>
>
>
> In one of the articles on our web site re current carrying capacity
>
> of traces, we include this observation (which is approximate).
>
> The resistivity of solder (depending on its composition) is
>
> approximately ten times higher than that for copper. Thus, you can
>
> think of the trace (pad) and solder as being two conductors in
>
> parallel --- one with 10x the resistance of the other (assuming
>
> similar widths and thicknesses.)
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>
>
> On standard traces, we tell our customers to ignore the current
>
> carrying capacity of the solder and just consider the copper itself.
>
> Then it is determined just by the cross-sectional area of the copper.
>
>
>
> Doug Brooks
>
> UltraCAD
>
> http://www.ultracad.com
>
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>
> At 11:03 AM 7/21/2009, Gumaste, Vijaylaxmi wrote:
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>   
>> Hi,
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>> I want to determine current carrying capacity of solder pads -
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>> effect of solder material/ land-pad size for very high current
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>> applications (>5A-10A per solder pad)
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>> I can use IPC spec to design appropriate metal layer trace
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>> widths/thickness for a required temp rise.
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>> However, I am looking at options to estimate/calculate/simulate
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>> current carrying capacity for solder pads.
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>> -Vijaya.
>>     
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> Check out our resources at  http://www.ultracad.com
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