[SI-LIST] Re: PCB extractor to obtain S parameters

Hi, all SI-guys:
       Conventional microstrip line was analyzed by the Comformal
transformation (complex function theory) or spatial domain analysis, then
equivalent circuits were derived from them. These methods and related
similar methods assumed ideal reference plan, fast but not accurate.
       Many IEEE Microwave Theory and Technology papers address the
characteristics of ideal reference planes, and some authors developed
equivalent circuits for this structure. But the equivalent circuits are
valid only for certain limited cases, fast but not accurate, too.
       Split or aperture in reference plan can be accurately calculated by
2D/3D electromagnetic solvers, hence the analysis is always time-consuming.
Aperture/slot antenna/array is created using this structure, then for PCB
design, aperture/split may induce discontinuity of impedance, and also EM
radiation.
       From my understanding, many simulation tools apply equivalent
circuits to simulate ideal and non-ideal reference plane, but they are not
accurate for full-frequency spectrum, and no capability to calculate the
radiation parameters.

Thanks
Long Yang
Gilda Radner  - "Adopted kids are such a pain - you have to teach them how
to look like you."

On Sat, Aug 9, 2008 at 2:18 AM, Lance Wang <lwang@xxxxxxxxxx> wrote:

> Ravinder,
> I don't think this is true. Allegro PCB SI can deal with Split planes. And
> it can deal with no plane
> situations too.
>
> Regards,
> Lance Wang
> IO Methodology Inc.
>
> 978-764-2298
>   - Enhance your Signal Integrity Analysis Performance
> Goto  <http://www.iometh.com/> www.iometh.com for details
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of
> Ravinder.Ajmani@xxxxxxxxxxxxxx
> Sent: Friday, August 08, 2008 1:51 PM
> To: Ferhat Yaldiz
> Cc: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: PCB extractor to obtain S parameters
> Hi Ferhat,
> It is my understanding that Allegro PCB SI uses the Ground/Power planes
> specified in the card stackup for signal return, and it assumes them to be
>
> ideal planes, ignoring the plane splits and via perforations.  If there is
>
> a special feature for split plane simulation then will you please
>
> elaborate on it.
>
>
>
> Thanks.
>
>
>
> Regards,
>
> Ravinder Ajmani
>
> Server PCB Development
>
> Hitachi Global Storage Technologies
>
>
>
>
>
> Email: Ravinder.Ajmani@xxxxxxxxxxxxxx
>
>
>
>
>
>
>
> "Ferhat Yaldiz" <ferhat.yaldiz@xxxxxxxxxxxxxx>
>
> Sent by: si-list-bounce@xxxxxxxxxxxxx
>
> 08/08/2008 12:06 AM
>
>
>
> To
>
> "'qazi'" <qazi@xxxxxxxxxx>, "'Bill Dempsey'" <bdempsey85@xxxxxxxxx>,
>
> <Alexandre.AMEDEO@xxxxxxxxxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
>
> cc
>
>
>
> Subject
>
> [SI-LIST] Re: PCB extractor to obtain S parameters
>
>
>
>
>
>
>
>
>
>
>
>
>
> Hi Qazi,
>
>
>
> Allegro PCB SI supports split plane simulation. This is very powerful in
>
> high density boards. I compared results critical nets have split planes
>
> and
>
> have ideal planes. As I know, Hyperlynx thinks signal return path is
>
> ideal. (I read it own manual.)
>
>
>
> Best Regards,
>
>
>
> FERHAT YALDIZ
>
> HARDWARE DESIGN ENG.
>
> TUBITAK - ITI
>
> TURKIYE
>
>
>
> -----Original Message-----
>
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
>
> On
>
> Behalf Of qazi
>
> Sent: Friday, August 08, 2008 2:26 AM
>
> To: 'Bill Dempsey'; Alexandre.AMEDEO@xxxxxxxxxxxxxxxxxx;
>
> si-list@xxxxxxxxxxxxx
>
> Subject: [SI-LIST] Re: PCB extractor to obtain S parameters
>
>
>
> I don't think Hyperlynx or Allegro SI can take split paths into
>
> consideration. Unless they have, of course made a very recent update that
>
> I
>
> am not aware of.
>
>
>
> -Qazi
>
>
>
> -----Original Message-----
>
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
>
> On
>
> Behalf Of Bill Dempsey
>
> Sent: Thursday, August 07, 2008 1:39 PM
>
> To: Alexandre.AMEDEO@xxxxxxxxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
>
> Subject: [SI-LIST] Re: PCB extractor to obtain S parameters
>
>
>
> Be sure to ask your tool vendor if they assume an ideal return path or if
>
> they consider defective return paths (plane splits).  Not all vendors can
>
> do
>
> that...
>
> The ones I am aware of that have Allegro plug-ins are:
>
> Applied Wave Research
>
> CST
>
> HFSS
>
> Others?
>
>
>
> > -----Original Message-----
>
> > From: si-list-bounce@xxxxxxxxxxxxx
>
> > [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of
>
> > Alexandre.AMEDEO@xxxxxxxxxxxxxxxxxx
>
> > Sent: Thursday, August 07, 2008 4:24 AM
>
> > To: si-list@xxxxxxxxxxxxx
>
> > Subject: [SI-LIST] PCB extractor to obtain S parameters
>
> >
>
> > Hi all,
>
> >
>
> > I am looking for all PCB tools who can extract PCB
>
> > information from Cadence tools and execute analysis to have S
>
> > parameters of, for example, a differential trace.
>
> >
>
> > Thanks and regards,
>
> >
>
> > Thales Land & Joint System - Colombes
>
> >
>
> > Alexandre AMEDEO
>
> > Intégrité du Signal
>
> >
>
> >
>
> > -----Message d'origine-----
>
> > De : si-list-bounce@xxxxxxxxxxxxx
>
> > [mailto:si-list-bounce@xxxxxxxxxxxxx]De la part de Luong
>
> > Hoang Envoyé : jeudi 7 août 2008 00:33 À :
>
> > si-list@xxxxxxxxxxxxx Objet : [SI-LIST] Signal Integrity
>
> > position at Juniper Networks
>
> >
>
> >
>
> > Hi all we're looking to fill some signal integrity positions
>
> > at Juniper Networks (Sunnyvale, CA).
>
> > If you're interested, you can contact the recruiter through
>
> > his email at
>
> >
>
> >
>
> >
>
> > BenW@xxxxxxxxxxx   /  BenW[at]Juniper.net
>
> >
>
> >
>
> >
>
> > Here is a brief description...
>
> >
>
> >
>
> >
>
> > System level signal integrity and timing analysis on boards,
>
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>
> >
>
> >
>
> >
>
> > - Design timing (setup/hold board timing analysis and clock design).
>
> >
>
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>
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>
> >
>
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>
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>
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>
> >
>
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>
> >
>
> > - Use lab equipment such as oscilloscopes, Time Domain
>
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>
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>
> >
>
> > - Proficient with HSPICE, Allegro, SiSoft, Speed2K, PowerSI,
>
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