[SI-LIST] Re: PCB Leakage Currents

I appreciate all of the input from the list.  I have discovered one
thing upon further probing with a hand held DMM.  As I mentioned
previously I have several DC power supplies that are routed to the board
as well (+24V, -24V, +5V, +12V, -12V).  When I measure resistance
between these DC traces and the trace to the MOSFET drain pin, I am
observing between 10M-ohm to 50M-ohm.  There is supposed to be no
physical path between the digital and drain pin traces.  This connection
between the 2 appears capacitive because I can watch the resistance on
the meter rise and then ultimately go infinite (open circuit). =20

Also, I don't believe that I am dealing with contamination, since this
is repeatable on 2 of the same boards that were manufactured 6 months
apart.

Thanks,

Chris

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Ed Sayre III
Sent: Wednesday, April 20, 2005 1:13 PM
To: Jakubiec Christopher (IFNA AI QM CM)
Cc: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: PCB Leakage Currents


Chris,
   I saw something like this when I was a test engineer .  My experience

lead back to the fabrication of the board in the socket area.  If the=20
clearance is not large enough sometimes the etch does not remove all the

copper.  The leakage path is usually lateral along the board surface or=20
between the PCB layers.
   That being said, Have you looked at an unpopulated board?  200nA may
be=20
component leakage?  I would recommend you look at all the components on
the=20
board and make sure that you do not have a leakage path though them.
Also=20
if that does not work, try thermally imagining the board, the area of=20
leakage will show up as warmer then the rest.

Good luck
-Ed Sayre





At 08:55 AM 4/20/2005 -0700, Christopher.Jakubiec@xxxxxxxxxxxx wrote:
>All,
>
>I am currently working with a PCB DUT board that interfaces to an ATE=20
>(tester).  I am using this board along with a single socket to measure=20
>power MOSFET DC characteristics.  The PCB is a simple 4 layer board=20
>that routes the force/sense resources of the tester to the MOSFET=20
>socket.  I currently do not know the exact layer stackup of the board=20
>since I merely created the schematic, and the layout was done=20
>elsewhere.  I do know that there are a set of force and sense traces on

>the board for 5 individual tester resources.  1 resource connects to=20
>the gate, 3 resources to the drain, & 1 resource to the source(source=20
>is also tied to ground).  There are also some digital traces on the=20
>board that bring digital power for the EEPROM and the relays, and these

>have tantalum and electrolytic capacitors included.  Everything on the=20
>board, analog and digital are using 1 single point ground.
>
>My problem is when I am trying to measure off-state leakage from drain=20
>to source of the MOSFET (Vgs =3D3D 0V, Vds =3D3D 55V), I measure >200nA =
of=20
>current before I even put the device in the socket.  When I repeat the=20
>measurement with a blank PCB board I measure 20nA, so I don't believe=20
>that it is coming from the tester or cables.  The tester resource that=20
>I am using for the measurement has accuracy & resolution <100pA.  Any=20
>ideas of where this 200nA leakage current may be coming from?
>
>Thanks,
>
>Chris
>Infineon Technologies
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