[SI-LIST] PCB Layer Stack up
- From: pom gud <pomgud@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Tue, 30 Nov 2004 20:05:01 -0800 (PST)
Hello
Can somebody tell me about how to decide PCB layer
stack up of any PCB? What are different points we need
to consider before arraving at suitable layer stack
up? If there is any web site, application note
explaining these points in detail, pls let me know.
Thanks
__________________________________
Do you Yahoo!?
Yahoo! Mail - You care about security. So do we.
http://promotions.yahoo.com/new_mail
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
http://www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List FAQ wiki page is located at:
http://si-list.org/wiki/wiki.pl?Si-List_FAQ
List technical documents are available at:
http://www.si-list.org
List archives are viewable at:
http://www.freelists.org/archives/si-list
or at our remote archives:
http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
- References:
- [SI-LIST] Re: SDRAM timing
- From: Scott McMorrow
Other related posts:
- » [SI-LIST] PCB Layer Stack up
- » [SI-LIST] Re: PCB Layer Stack up
- » [SI-LIST] Re: PCB Layer Stack up
- [SI-LIST] Re: SDRAM timing
- From: Scott McMorrow