[SI-LIST] PCB Fabrication Compensation

Hi All,
HyperLynx Stackup Editor has a button for enabling the PCB Fabrication 
Compensation.  If this is enabled, a reduced trace width is used in the 
impedance calculation to account for over-etching in the fabrication 
process.  This results in field solver showing a higher impedance value 
than the actual value when this compensation is disabled.  The HyperLynx 
document states that this compensation should not be enabled, because all 
good board houses apply compensation to the trace geometry provided to 
them, to ensure that the final etched trace width is same as the designed 
trace width. 
We use 4 mil trace width in our boards, and I have seen wide variation in 
impedance between boards from different fab houses (particularly between 
USA and Far-East places).  I have the following questions for the esteemed 
list members:
1) Have you seen similar variations in impedance between different board 
shops.
2) When you specify the design parameters, do you compensate them for 
over-etching, or do you provide the actual parameters for specified 
impedance.
3) What should one do when one needs a test board designed for a certain 
impedance.
Thanks to you all.
Regards, Ravinder
Server PCB and Flex Development
Hitachi Global Storage Technologies


Email: Ravinder.Ajmani@xxxxxxxx



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