[SI-LIST] Re: Overshoot / Undershoot
- From: Sanchayan Sinha <sanchayan@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Fri, 13 Jan 2006 12:13:13 +0530
Gurus,
I have a couple of question regarding DDR I/O's.
- I did my simulations with a particular old POP package data for DDR
I/O's, i now have new data where i see 2X increase in L, 1.5X increase
in R and 1.7X increase in C. I would like to know what may be the
possible effects (qualitatively) of this on the ringing, overshoot
undershoot etc.
- Whats the JEDEC standard for duty cycle measuring point ( is it 50%
clock swing or the crossover point of clk and CLK bar).
Thanks,
Sanchayan
On 1/13/06, Dagmara Avanindra <dagmara.avanindra@xxxxxxxxx> wrote:
>
> Andrew,
> you need to look at the spec of the receiver to see what is the max
> overshoot it can tolearate AND for how long it can tolerate it.
> If you have a very excessive overshoot, such as the one you mention in
> your
> email, you may forward bias clamping diodes on the receiver.
>
> Thanks,
> Dagmara
>
> On 1/12/06, Andrew Seddon <andrew.seddon@xxxxxxxxxxxx> wrote:
> >
> > Hello,
> >
> >
> > I was wondering if anybody had an idea of what is a typically acceptable
> > bad
> > but workable overshoot/undershoot on a 3.3V system? For example I see
> some
> > memory IC's can take transients upto 5.5v where as the datasheet max is
> > say
> > +0.3. Obviously this figure is based on DC.
> >
> > I presume the major effect's of over/under shoot are to reduce working
> > life
> > of the IC and make the circuit potentially fail at temperature extremes?
> >
> > So when you guys analyse overshoot/undershoot how do you decide if it's
> > acceptable?
> >
> > Kind regards,
> >
> > Andrew
> >
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