[SI-LIST] Re: Overshoot / Undershoot
- From: "Andrew Seddon" <andrew.seddon@xxxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Sat, 17 Sep 2005 10:35:44 +0100
Yes that sounds like a really useful spec, if you could have the model and
allowable limit's in one file it would greatly simplify matters.
I'm currently checking with the component manufactures on their
recommendations. Unfortunately it seem's quite difficult to get such
specifications. The guide I am working to is their self designed development
kit's, which fairly significantly exceed their DC specification on
overshoot.
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Pratt, Gary
Sent: 17 January 2006 01:51
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Overshoot / Undershoot
For pre-fabrication SI analysis, this looks like another example of
where IBIS 4.1 AMS would be useful. Building an AMS model that would
flag an error if the JEDEC specification limits were exceeded would be
fairly easy. =20
In fact, I suspect the creators of this standard might have preferred a
more complex measurement technique such as calculating the actual area
under the overshoot curve (instead of a triangle from the peak). Or,
perhaps calculating the average and instantaneous power being dissipated
by the protection diodes (or perhaps the actual temperature of the diode
junction). Any of these would be possible to calculate with an IBIS 4.1
AMS model. =20
Let me know if you are interested in more information.
Gary
=20
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Bill.Cohen@xxxxxxxxxxxxxxxx
Sent: Thursday, January 12, 2006 6:45 PM
To: andrew.seddon@xxxxxxxxxxxx
Cc: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Overshoot / Undershoot
Andrew,
JEDEC has an overshoot/undershoot specification for DDR2 a 1.8V
technology.
Older technologies relied on an absolute voltage but the newer
technologies work on an absolute maximum and an area (above/below power)
of stress. This area limits the overshoot stress into a maximum stress
for a period of time. The long time reliability of the gate oxide is at
issue here and the duty cycle of the signal also comes into play. Look
at the DDR2 datasheet
(JEDEC.org) and look at the stress model they have for
undershoot/overshoot of input signals. We have incorporated this model
into our latest specifications.
Best Regards,
--------------------------------------------------------------
| Bill Cohen
| Toshiba America Electronic Components
| Mixed Signal Design Group
--------------------------------------------------------------
=20
"Andrew Seddon"
<andrew.seddon@ca
msig.co.uk>
To=20
Sent by: <si-list@xxxxxxxxxxxxx>
si-list-bounce@fr
cc=20
eelists.org
=20
Subject=20
[SI-LIST] Overshoot / Undershoot
01/12/2006 07:30
PM
=20
=20
Please respond to
andrew.seddon@cam
sig.co.uk
=20
=20
Hello,
I was wondering if anybody had an idea of what is a typically acceptable
bad but workable overshoot/undershoot on a 3.3V system? For example I
see some memory IC's can take transients upto 5.5v where as the
datasheet max is say
+0.3. Obviously this figure is based on DC.
I presume the major effect's of over/under shoot are to reduce working
life of the IC and make the circuit potentially fail at temperature
extremes?
So when you guys analyse overshoot/undershoot how do you decide if it's
acceptable?
Kind regards,
Andrew
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