[SI-LIST] Re: N-port model limitations in simulators
- From: Larry Smith <Larry.Smith@xxxxxxx>
- To: si-list@xxxxxxxxxxxxx, Larry.Smith@xxxxxxx, jrp@xxxxxxxxxxx
- Date: Mon, 28 Apr 2003 11:08:01 -0700 (PDT)
Joel - Thanks for your note back. Also, thanks to the several
responders to this thread that Ray started. The basic question at
stake here is "How do we use S parameter models to represent the
interconnect components, commonly found in our computer systems, in a
circuit simulator?" Perhaps I am mixing up two processes (modeling of
a circuit component; solving a set of circuit equations), but I think
it is necessary to have a fundamental understanding of both in order to
get correct answers from a circuit simulator.
For example, a connector vendor may hand you two simulatable spice
models for his connector that are very different in nature. The first
spice model may use the same reference node for the left and right side
of the connector. The second model may have an inductance and a
resistance between the left and right reference nodes. The first model
is valid for waveforms and delay from one side to the other. The
second is valid for waveforms including the effects of simultaneous
switch noise (SSN) as return current for each signal flows through a
common impedance. The person doing the simulation has to decide which
model to use and how to use it. If he hooks the left and right
reference nodes of the second model to spice node zero, he will get
incorrect results. Here is an example where the person doing the
simulation needs to know something about the assumptions made by the
person who made the model. In the case of a simple spice model, it is
easy to look into the spice code and figure it out. However, this is
not true with an S, Y or Z parameter models.
............... ...............
: : : :
sig1L o-:-LLLL---RRRR-:-o sig1R sig1L o-:-LLLL---RRRR-:-o sig1R
: : : :
sig1L o-:-LLLL---RRRR-:-o sig1R sig1L o-:-LLLL---RRRR-:-o sig1R
: : : :
sig1L o-:-LLLL---RRRR-:-o sig1R sig1L o-:-LLLL---RRRR-:-o sig1R
:.............: : :
| gnd1L o-:-LLLL---RRRR-:-o gnd1R
ref :.............:
Spice Model 1 Spice Model 2
It is possible to transform model 2 into a model with just one
reference node. Brian Young has a nice discussion on this in his
chapter on inductance. Through matrix manipulation, the voltage on the
reference node on the right side can be made identical with the
reference voltage on the left side. The relationship between all the
voltages on the left side remains the same; the relationship of all
voltages on the right side remain the same; and the currents into each
node remain the same. But, don't look inside the model! All you will
see is a bunch of equations and parameters (Y or Z). The parameters in
the black box will be very different for model 1 and model 2 after
model 2 has been converted to have a single reference node. The
parameters for model 2 will give you SSN information, the parameters
for model 1 will not, but it will be impossible to tell that by
inspection.
Now, back to the discussion on the number of terminals for N ports.
Suppose we have an S parameter model for this connector that came from
either lab measurements or EM extraction. If we measured this connector
in the lab, we would probably say that it has 6 ports, 3 on the left
and 3 on the right. We would attach VNA port 1 between a signal and
it's reference, port 2 between another signal and it's reference and 50
Ohm terminations between the other signal and reference nodes. Many
measurements are required, attaching and reattaching the VNA until all
6 port parameters are obtained. We would say that the connector has 12
terminals, two for each port.
Next we need to bring the S parameter model for the connector into a
circuit simulator. We desire to attach two circuit boards together
with the connector. Other components in the circuit simulator may
include two sets of 3-coupled-transmission lines, a socket and two
electronic packages that are positioned between two nonlinear circuits
(driver and receiver).
The S elements in the circuit simulators that I am familiar with have 7
terminals for the 6 port connector. Each of the packaging components
may have S parameter models with 7 terminals for the 6 ports. Some of
the components (transmission lines) are long compared to a wavelength
which invalidates the quasi-static assumption. Other components
(connector and possibly the electronic packages) have partial
inductance from the left side to the right. Each of the components
have issues with voltage uniqueness. As long as you stay on the left
side or the right side, all voltages have the correct relationship.
But measuring voltages across the component is like measuring voltage
across time or across partial inductance, neither of which is valid.
We want know the openness of the eye diagram at the receiver after
simulating all of these models cascaded together. The two choices are
to 1) transform the models to the time domain and do a transient
simulation, or 2) Simulate in the frequency domain and transform the
results to the time domain (but that discussion is beyond the scope of
this thread). A whole bunch of questions come up for this simulation:
1) Will the S parameter model for the connector give information about
SSN? As discussed above, connector model 2 will give SSN information,
even with the 7 terminal version, but you can't tell that by looking at
the model.
2) How do S parameter models handle impedances in the return path?
This is extremely important for the SSN and crosstalk problems. It
seems that the measurement technique mentioned above has not obtained
enough information to deal with the return path impedance. If we
wanted to measure the impedance between the left and right reference
terminals, how would we do it? Which terminals would we connect the
VNA to? If we get another reference plane involved, where should it
be located?
3) How many terminals should an N Port box have in a circuit
simulator? It might make sense to have a reference point for every
portion of the circuit that is separated from another portion by a
significant time delay or set of partial inductances.
4) What are the rules for connecting the terminals in the circuit
simulator? It seems obvious that you would not want to connect a
resistor across the length of a 20 inch transmission line, but is there
anything in the S parameter model that tells us not to do this? It
seems that there should be a set of terminals that can have lumped
element models connected between them and another set that cannot.
This would be the groupings mentioned in question 3.
In summary, I think that in order to make a simulatable circuit model,
you have to know a lot about the environment where it will be used. In
order to correctly use a circuit model in a simulator, you have to
understand the assumptions that were made when the model was built.
With simple spice RLC models, it is fairly easy to just look at the
models and know. With S, Y and Z models, I don't think you can tell by
inspection. The way that a model must be used may have already been
determined by the number of reference nodes that it has. I am not
convinced that S parameters capture the impedance in the return path
that is necessary for crosstalk and SSN simulations. This has a lot
to do with the number of terminals assumed when developing the model
and using the circuit simulator. (Can anybody help me or am I beyond
help??)
All comments welcome..! Sorry for the long email.
regards,
Larry Smith
Sun Microsystems
PS - I just scanned some of the previous responses on this thread and
have obtained new insights into some of the things mentioned by Ege
Engin, Jian Zheng, Marek Schmidt-Szal and others. They have already
pointed out many of the issues above. Perhaps the examples presented
here will make the issues clear to other people. I could not really
understand the issues until they were associated with a clear example.
> Date: Fri, 25 Apr 2003 19:24:16 -0700 (PDT)
> X-Authentication-Warning: cds11562.Cadence.COM: jrp set sender to
jrp@xxxxxxxxxxxxxxxxxxxx using -f
> From: "Joel R. Phillips" <jrp@xxxxxxxxxxx>
> To: si-list@xxxxxxxxxxxxx, Larry.Smith@xxxxxxx
> Subject: Re: [SI-LIST] Re: N-port model limitations in simulators
> X-Received: By mailgate.Cadence.COM as TAA20277 at Fri Apr 25 19:26:45 2003
>
>
>
> >Date: Fri, 25 Apr 2003 18:18:11 -0700 (PDT)
> >From: Larry Smith <Larry.Smith@xxxxxxx>
>
> >However, For the Y and Z parameters, I believe we need a common
> >reference point in order for voltage to be defined. If there is no
> >common reference point, then what do we measure the voltage on port 1
> >with respect to? If there is a reference point for each terminal, we
> >don't get unique voltages. If ports 2, 3, ... have a different
> >reference levels than port 1, I don't think the equations work. Sure,
> >you can do the math and convert S to Z or Y matrices, but how do you
> >interpret the voltages if there is not a common reference node. How do
> >you hook it up in a circuit simulator?
>
> Larry,
>
> I think you are mixing up two separate processes: the process of trying to
> model a circuit component, or sub-circuit, and the process of trying to
> solve a set of circuit equations, which are assembled from many separate
> sub-circuits, all (presumably) connected together.
>
> When the circuit simulator goes to solve its equations, it must select a
> reference node in order to obtain a unique solution. It is not actually
> necessary to specify this node in advance -- in principle, the simulator
> can pick *any node whatsoever*. Circuit designers usually have some idea
> which node they want to be the global voltage reference, and most
> simulators by default pick that node for their reference, but it's actually
> an arbitrary choice as far as the simulator is concerned (or the real
> world, for that matter). But at this point, and only at this point, you
> must make your choice.
>
> When constructing models, on the other hand, it is only necessary to know
> how N port currents relate to N relative voltage difference on the nodes of
> the device. The simulator knows (or should know) how to hook such models
> up in a consistent manner; once it has all the models and sources, it can
> perform the full circuit solution. At that point the simulator will set
> the (hopefully unique) absolute values of the voltages on the port nodes,
> relative to the single, global reference node. You cannot expect to get
> absolute voltages before that point because you have not fully specified
> the problem, the behavior of the subcircuit acting in its environment, you
> have only specified the behavior of the subcircuit.
>
> For that matter, until that point, you can't even know that there *are*
> unique voltages. If parts of the circuit are completely disconnected,
> there is no unique solution. If what is inside the black-box is N
> disconnected resistors, and you connect current sources in parallel outside
> the box, the solution is highly non-unique. You can pick N arbitrary
> voltage offsets, one for each port, and still have valid solutions to the
> KCL/KVL equations. Your black-box model must admit this possibility if it
> is to faithfully represent the behavior of the original circuit.
>
> Regards,
>
> ***********************************************************************
> Joel Phillips Cadence Berkeley Laboratories
> jrp@xxxxxxxxxxx 2655 Seeley Rd, MS 1A1
> Tel: (408) 944-7983 San Jose, CA. 95134
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