[SI-LIST] New Teraspeed Papers and Presentations

I've just posted quite a few papers and presentations concerning power 
system and high speed interconnect design on the Teraspeed website. The 
following papers have been posted:
*/NEW/ - PCB Design Methods for Optimum FPGA SerDes Jitter Performance 
(paper) (slides) *

*/NEW/ - Considerations for Capacitor Selection in FPGA Designs (slides) *

*/NEW/ - Bypass Capacitor Inductance, Data Sheet Simplicity to Practical 
Reality (slides) *

*/NEW/ - Bypass Filter Design Considerations for Modern Digital Systems 
(slides) *

*/NEW/ - **System Considerations for Bypass Filter Designs (slides) *

*/NEW/ - Impact of PCB Stack-up and Capacitor Via Design In Power 
Distribution Design (slides) *

***/NEW/ - Using MWS for High Bandwidth Connector Launch Optimizations 
(slides) *

*****/NEW/ - Design and Modeling of Future Ultra-High-Speed Interconnect 
Systems (slides) *

*******/NEW/ - Simplified Design and Modeling of Surface Mount Connector 
Pad Transitions for Applications at 10 to 20 Gbps NRZ (slides) *

*********/NEW/ - How to Use Connector Spice Models (slides) *

*********/NEW/ - Connector Pinout - The Art and Science of Assigning 
Connector Grounds (slides) *





Scott McMorrow
Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
(401) 284-1827 Business
(401) 284-1840 Fax

http://www.teraspeed.com

Teraspeed® is the registered service mark of
Teraspeed Consulting Group LLC



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