[SI-LIST] Re: Needed - compelling examples of SI failures andassociated impacts
- From: Mike Mayer <mwmayer@xxxxxxx>
- To: p2rich@xxxxxxxxxxxxx
- Date: Mon, 29 Mar 2004 07:34:37 -0600
You could get an evaluation copy of a tool and run it on one of your
designs. If the tool finds significant problems, you can use that to
make your case. Or, if there is an older design that had SI or timing
issues run the tool on it and see if it finds the problem.
On Mon, 2004-03-29 at 06:44, Rich Peyton wrote:
> D,
>
> I believe it comes down to cost --- can you justify the cost it will =
> take to
> implement a SI dept? Someone else's SI issues will not sway the =
> purchase of
> the needed supplies, you need to find your internal SI issues at hand, =
> would
> having SI supplies save -- money, time, manpower, R&D etc.. Document how
> these issues could have been resolved with SI supplies. Dependant upon =
> the
> size and budget of said company here are some questions which you may =
> want
> to answer to determine the usefulness/need:
>
> Questions: =09
> Cost: =09
> 1)What product prototypes have failed due to SI or EMC problems?
>
>
> 2)How many prototype turns are required for each product?
>
>
> 3)How much does prototype turn cost, including testing & redesign time?
>
>
> 4)How much can the time-to-market be shortened when a prototype turn is
> saved?
>
>
>
> Don't feel bad -- I think there are allot of engineers in the same boat =
> as
> you --- namely ME --- I want my SI Tools !! :-)
>
>
> Regards,
> Rich =09
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] =
> On
> Behalf Of Mike Brown
> Sent: Sunday, March 28, 2004 2:16 PM
> To: surfsup3@xxxxxxx
> Cc: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: Needed - compelling examples of SI failures and
> associated impacts
>
>
> It is terribly hard to know what management will consider "compelling".=20
> Product failure in the lab, or on the production line is one. Late=20
> delivery due to redesign is another, if there is any sensitivity to the=20
> time value of money.
>
> The fact that you are just getting into sensitive edge rates tells me=20
> that you are using old technology - maybe really old. I've been=20
> wrestling with SI issues for 25 years or more, and not working with=20
> bleeding edge technology. A 2 inch trace can give you grief today, if=20
> not properly driven or terminated.
>
> Your design may be relying on slow edge rates for reliable operation,=20
> unbeknownst to anyone. The fact is that slow edge rates can go away=20
> almost without notice, if your vendor decides to build old part numbers=20
> on a modern fab line. It isn't for nothing that vendors who bother to=20
> spec a minimum prop delay on old logic often specify "0". Zero. This=20
> gives them the latitude to build the parts with any technology=20
> improvement they like. You may be able to pay someone to continue to=20
> make your parts on an obsolete fab line - but they *will* become=20
> expensive parts if you do so.
>
> "Accidental SI" a time bomb in your system. Your design which has been=20
> working reliably for years may stop working completely when you build it =
>
> with the latest rev of parts. Or become unreliable at some=20
> environmental corner. I would expect your systems to be exposed to=20
> environmental extremes that will bring out the worst in your design.
>
> Going back a ways, I had a design that was built around a 2901 4-bit=20
> slice. I ASS-U-MEd that the minimum Tpd was half of typical, since the=20
> minimum was not specified by the manufacturer. That assumption was=20
> reviewed along with the rest of the design, and passed muster. For a=20
> while. All was well when the vendor switched to the 2901A and 2901B=20
> (still in packages marked 2901) When they switched to 2901C a few years=20
> later, my design began to fail in large numbers. There was a race=20
> condition revealed by the fast part, whose Max Tpd was faster than the=20
> minimum that I had designed to. The design was guaranteed to fail under =
>
> those conditions, and it did so. A design revision was made, under=20
> pressure while the production line was stopped. A most uncomfortable=20
> experience, for sure.
>
> The above isn't exactly an SI issue, but they also hide undetected until =
>
> a fast part gets inserted into the right place in the system. It seems=20
> that SI and timing go hand-in-hand.
>
> A good SI group can save you from these kinds of problems by providing=20
> design guidance in the realm of termination specs, topology definition,=20
> etc. A robust SI design is insurance against failure in the lab, and=20
> against later production failure.
>
> Good luck with your management.
>
> Mike
>
> D wrote:
> > Dear experts,
> > I work for one of the largest aerospace companies in the world. Our=20
> > systems are unbelievably complex although our digital edge rates are=20
> > only recently starting to cause our interfaces to behave in a=20
> > distributed manner. I have been on a crusade the past few months to=20
> > convince management to form a signal integrity team and cast aside=20
> > outdated rules of thumb and the "design it and hope that it works"=20
> > mentality.
> >=20
> > I can't help but believe that some of you on this list have been in=20
> > the same predicament. I am extremely interested in hearing your=20
> > stories. More importantly, I am looking for examples and impacts of=20
> > device, board, or system level catastrophic SI failures to help me=20
> > drive home my point during my next attempt to show the decision makers =
>
> > the light.
> >=20
> > Thanks in advance for your help.
> >=20
> > Rgds,
> >=20
> > D
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--
=============================================================================
Mike Mayer
mwmayer@xxxxxxx
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