[SI-LIST] Re: Need advice on basic 6-layer stackup - board warpage
- From: steve weir <weirsi@xxxxxxxxxx>
- To: GrahamDavies@xxxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Thu, 28 Apr 2005 12:42:18 -0700
At 11:44 AM 4/28/2005 +0000, Graham Davies wrote:
>--- In si-list@xxxxxxxxxxxxxxx, steve weir <weirsi@xxxx> wrote:
>
> > ... I would be quite hesitant to
> > leave a solid plane unbalanced.
> > Since you have options that will
> > not otherwise impair your design,
> > I would employ them.
>
>OK, if I swap the layers as you suggested, from the top down I have:
Yes, this is what I recommend:
>top copper, mainly breakouts, not much routing
>ground plane
>power plane
>(large layer spacing here, others small)
>internal routing
>ground place
>bottom routing
>
>and the problem is that the power plane isn't balanced by another
>solid plane.
Yes, again. So you can reduce the imbalance by changing from a solid fill
to a grid pattern, such as 0.015 lines on a 0.050 grid. The result will be
close to a 50% reduction in Cu density and power to ground plane
capacitance, while average spreading inductance and resistance will each
double.
>As the layer that is opposite to it is one of my two
>routing layers (assuming, as you said, I won't get much routing done
>on the top, which is, in any case, referenced to a different plane) I
A note here. Yes signals on top are referenced to a "different
plane". However, since both planes at layers 2 and 5 are at the same DC
potential, they can be stitched together with vias, making for small
cavities. The result is that you get very good quality return path for any
routing on any combination of layers 1, 4 and 6.
>can't do much with that and still hope to route the board. It looks
>as if my main option is to not have a solid power plane at all but
>break it up sufficiently to avoid board warpage.
Reducing the copper weight on 3 with a grid will help. I would leave the
grid weight to last. First route everything else, and then see what you
can flood with ground on Layer 4. Estimate the copper density on 4 as a
result, and then grid on 3 to get in the ballpark. Then evaluate the power
delivery impedance that results. If necessary, adjust the quantity of
bypass caps to pull in to meet your requirements. Life should be good.
>Another option might
>be to have a power plane but no ground plane near the top of the
>board.
Bad idea.
>In both cases, I lose the embedded capacitor and exacerbate
>power distribution problems. I'm not sure I can see a way out of this.
>
>Graham.
>
>
>
>
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- References:
- [SI-LIST] Re: Need advice on basic 6-layer stackup - board warpage
- From: steve weir
- [SI-LIST] Re: Need advice on basic 6-layer stackup - board warpage
- From: Graham Davies
Other related posts:
- » [SI-LIST] Re: Need advice on basic 6-layer stackup - board warpage
- » [SI-LIST] Re: Need advice on basic 6-layer stackup - board warpage
- » [SI-LIST] Re: Need advice on basic 6-layer stackup - board warpage
- » [SI-LIST] Re: Need advice on basic 6-layer stackup - board warpage
- » [SI-LIST] Re: Need advice on basic 6-layer stackup - board warpage
- [SI-LIST] Re: Need advice on basic 6-layer stackup - board warpage
- From: steve weir
- [SI-LIST] Re: Need advice on basic 6-layer stackup - board warpage
- From: Graham Davies