[SI-LIST] Re: Need advice on basic 6-layer stackup
- From: "Anders Frederiksen" <af@xxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Sun, 17 Apr 2005 14:09:13 +0200 (CEST)
> Date: Sat, 16 Apr 2005 07:37:17 -0700
> From: Graham Davies <GrahamDavies@xxxxxxxx>
> Subject: Need advice on basic 6-layer stackup
> I have inherited a product that has a lot of
> problems that I believe are due to lousy signal integrity. I am
> looking for guidance in selecting a good basic stackup for a redesign
> of the PCB. [...]
>
> The current PCB is 6 layer as follows: component side signals, ground
> plane, inner signals, power plane, ground plane, bottom side signals.
This doesn't sond like a totally catstrophich stackup SI-wise.
(but it's common to balance planes to minimize warp)
You've got both supply plane and multiple grounds. I'd be more worried with the
6-8
adjacent routing layers we occasionally see ;-)
> Minimum trace width and spacing are both 0.006 in. Material is 1/16
> inch FR4 with 1 oz finished copper thickness for all layers. Maximum
> signal frequency is, I think, 40 MHz and there's really nothing very
> special going on anywhere. It's all pretty low tech and the design is
> five years old.
As pointed out Lynne it's the edgerates that defines the problems. For sampled
signals (typical data etc.) slow clock rates tend to help as the "dirt" can
settle
befor the clock.
> I have two revisions of the board. Both have the basic layer order as
> above but completely different layer separations. I think the layer
> order is fine, but I'm not really happy with either set of separations
> so this is where I'm asking for help.
Well, the stackup defines your trace impedances. And hence will influence the
needed
terminations etc. But without looking at the board it's hard to give sensible
advice.
[...]
I'll risk it and guess: You' got more significant problems than the stackup. It
could be lacking decoupling, timing problems and/or missing/insufficient
terminations. However, you are in luck: You've got boards to do measurements
on! =D
Check the supplies at IC pins. Look at the signals especially the clocks. When
you've terminated the stuff for nice signals start looking for the timing
problem!
Best regards,
Anders Frederiksen
PS to most (got to bitch a bit): Please remove at least the "SI-list signature"
when
answering (usually the stuff below your own signature is also redundant). The
digest
is usually large enough without 10-30 of those... ;-) Thanks! =D
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