[SI-LIST] Re: Multiboard Analysis
- From: steve weir <weirsi@xxxxxxxxxx>
- To: narasimha rao <narasimharaopatil@xxxxxxxxx>
- Date: Thu, 01 Jul 2010 01:36:17 -0700
If we are talking about unbuffered DIMMs look in Section 6.4 "Signal Net
Structures"
Steve.
narasimha rao wrote:
> Thanks for the reply,
>
> But for the diff clk it is not been defined, truly speaking DIMM
> module has got 5-chips inside and each will have separate clk.
>
> Regards,
> Narasimha
>
>
> --- On *Thu, 7/1/10, steve weir /<weirsi@xxxxxxxxxx>/* wrote:
>
>
> From: steve weir <weirsi@xxxxxxxxxx>
> Subject: [SI-LIST] Re: Multiboard Analysis
> To: "narasimha rao" <narasimharaopatil@xxxxxxxxx>
> Cc: si-list@xxxxxxxxxxxxx
> Date: Thursday, July 1, 2010, 11:06 AM
>
> DIMM specs are available from JEDEC.
>
> Steve.
> narasimha rao wrote:
> > Hi All,
> > In one processor interfaced with DDR2 MODULE analysis, I'm
> facing a problem in getting topology for ddr2 clk(diff).
> >
> > Can anybody help me in solving this?
> >
> > Regards,
> > Narasimha
> >
> >
> >
> >
> >
> >
> >
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> --
> Steve Weir
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Steve Weir
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