[SI-LIST] More on inducing interplane voltage in a four layer board by signals routed on top and bottom layers
- From: Doug Smith <doug@xxxxxxxxxx>
- To: Si-List <si-list@xxxxxxxxxxxxx>, emc-pstc <emc-pstc@xxxxxxxx>
- Date: Wed, 07 Jul 2010 19:54:25 -0700
HI All,
I performed last month's experiment on a mock-up 4 layer board, but this
timeusing time domain measurements instead of measuring in the frequency
domain. The result is just as stunning.
Title: Technical Tidbit - July 2010
Routing Signals Between PCB Layers - Part Four, Interplane Voltage
(Time Domain Measurement)
Abstract: Four layer PCBs are used in a wide variety of applications.
However, usually it is necessary for some signal paths to be routed on both
the top and bottom signal layers to achieve required routing density. Using
amodel of a four layer PCB with ground and power planes, data is presented
inthe time domain that shows routing signals on both signal layers can cause
significant signal voltage to be developed between the planes unless a
simpledesign rule is observed.
The URL of the article is:
http://emcesd.com/tt2010/tt070610.htm[1]
Last month's Technical Tidbit in the frequency domain is:
http://emcesd.com/tt2010/tt060310.htm[2]
Two other Technical Tidbits that bear on the same subject are:
http://emcesd.com/tt2006/tt040506.htm[3]
http://emcesd.com/tt2006/tt050106.htm[4]
Doug
-- ------------------------------------------------------- ___ _ Doug Smith
\/ ) P.O. Box 1457 ========= Los Gatos, CA 95031-1457 _ / \ / \ _ TEL/FAX:
408-356-4186/358-3799 / /\ \ ] / /\ \ Mobile: 408-858-4528 | q-----( ) | o |
Email: doug@xxxxxxxxxx[5] \ _ / ] \ _ / Website: http://www.dsmith.org[6]
-------------------------------------------------------
--- Links ---
1 http://emcesd.com/tt2010/tt070610.htm
2 http://emcesd.com/tt2010/tt060310.htm
3 http://emcesd.com/tt2006/tt040506.htm
4 http://emcesd.com/tt2006/tt050106.htm
5 mailto:doug@xxxxxxxxxx
6 http://www.dsmith.org
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