[SI-LIST] Modelling semiconductors in 2D field solvers

  • From: "Anil Pannikkat" <APANNIKK@xxxxxxxxxx>
  • To: <si-list@xxxxxxxxxxxxx>
  • Date: Fri, 17 Oct 2003 11:26:34 -0700

Hello
    So far all the modelling I have done has been on PCB's, backplanes and 
packages. Recently there has been a need to model on chip interconnect 
structures in the 0.13um and 90nm technologies. I was wondering if there is any 
major differences in setup for semiconductors (Si not being a pure dielectric, 
small size of the nets etc.)
 Are there any differences in boundary conditions to be used in SI2D or HFSS? 
Any other unusual effects I should watch out for.
Any input would be appreciated.
Thanks
Anil

       Anil Pannikkat
        MTS Package Development         * : 408-544-7542
        Altera Corporation                      Fax: 408-544-6404
        101, Innovation Drive, M/S 4202 *: apannikk@xxxxxxxxxx
        San Jose, CA 95134              *: http://www.altera.com


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