[SI-LIST] Re: Modeling Simultaneous Switching Noise

Hi Khalid,

There is an ECTC2001 published paper titled "A Simulation Study of
Simultaneous Switching Noise". This paper is written by  C. T. Chen and Q.
L. Chen, Intel; Jin Zhao, Sigrity.

This paper details comprehensive studies of simultaneous switching noise
(SSN) effects such as skew, overshoot, ringing, and power and ground
fluctuations for two types of packages: OLGA and WBGA, with or without
on-die interconnection models, different on-die decoupling capacitor values,
etc.

Download the paper (PDF Format) :
http://www.sigrity.com/SUPPORT/support_cus_doc.htm - Paper #6.

Hope that helps!

Winson

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Khalid Ansari
Sent: Monday, July 29, 2002 4:23 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Modeling Simultaneous Switching Noise



Hi,

I am planning to simulate SSO noise on my device.
I sort of understand the complexity involved.
Probably will have to do package and board models
using HFSS or some other field solver and an EDA tool,
somehow create a representation of board parasitics
and then run the simulations.  I am sure some of you
out there have worked on something similar, I would
really appreciate if you could share your experience
in terms of setting up the environment.  Is there
any literature out there that could be useful to me?
Thanks in advance,
Khalid
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