[SI-LIST] Modeling Simultaneous Switching Noise
- From: Khalid Ansari <KANSARI@xxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Mon, 29 Jul 2002 16:23:16 -0700
Hi,
I am planning to simulate SSO noise on my device.
I sort of understand the complexity involved.
Probably will have to do package and board models
using HFSS or some other field solver and an EDA tool,
somehow create a representation of board parasitics
and then run the simulations. I am sure some of you
out there have worked on something similar, I would
really appreciate if you could share your experience
in terms of setting up the environment. Is there
any literature out there that could be useful to me?
Thanks in advance,
Khalid
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