[SI-LIST] Re: Max & min parallelism
- From: "Hargin, Bill" <bill_hargin@xxxxxxxxxxx>
- To: "'trilok.budathoki@xxxxxx'" <trilok.budathoki@xxxxxx>, si-list@xxxxxxxxxxxxx
- Date: Tue, 17 Aug 2004 11:31:35 -0700
Hi Trilok:
In addition to min and max parallelism, you need to consider other critical
factors, including trace spacing, trace width, reference plane proximity (as
you noted), aggressor edge rate, termination, and receiver noise margins.
Pretty much all of the popular SI books that I'm aware of address this subject;
but - if you really want to make the right trade-offs here - simulation is the
only solution that makes sense, giving you the added flexibility of making some
manufacturing cost trade-offs at the same time.
Several simulators on the market may be able to do this for you. To see
exactly what I'm talking about, go to www.mentor.com/hyperlynx, download the
software demo/tutorial, and go to the "Crosstalk and differential-signal
analysis" link under "Pre-layout (LineSim)." 2 examples are provided that will
show what I'm referring to.
Bill Hargin
Product Manager - HyperLynx
Mentor Graphics Corp.
425-497-5079 - Direct
425-301-4425 - Mobile
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx
> [mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Budathoki,
> Trilok (GE
> Consumer & Industrial)
> Sent: Tuesday, August 03, 2004 12:08 AM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Max & min parallelism
>
>
> Hello Everyone,
> Can anyone explain me the criteria for determining the max &
> min value for adjacent layer parallelism.
> Does dielectric thickness play any role in determining the values?
> Thanks in advance
>
> Trilok Budathoki
> GE - India Business Center,
> *: 91-40-27881731
> * : trilok.budathoki@xxxxxx
>
>
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