[SI-LIST] Re: Macromodeling

Arpad, if the package is defined well enough, it seems a useful idea.  I 
like anything that will help reduce barriers to AMS going mainstream.

Regards,

Steve.
At 12:08 PM 3/28/2005 -0800, Muranyi, Arpad wrote:
>Hello Everyone!
>
>I was expecting some reactions to my last point I made
>last week in my response to Todd Westerhoff's posting
>on macromodeling.  Since I didn't see any responses, I
>would like to raise the question one more time.
>
>I would like to find out how people would feel about
>implementing Don's macromodeling proposal via a set of
>VHDL-AMS and Verilog-AMS controlled source and IBIS
>B-element primitives using the IBIS 4.1 keywords:=20
>
>[External Circuit], [Circuit Call] and [Node Declarations]?
>
>All of the *-AMS primitives could be released in some sort
>of a library (package) and we could make them all have a
>familiar look and feel, so that people using them wouldn't
>need to look inside them and/or know the language they
>were written with.  The IBIS 4.1 keywords would allow=20
>these primitives to be instantiated and connected any
>whichever way.  This would enable the (macro-)model makers
>to use a familiar interface, and do everything Don claims
>that can be done with macromodeling, and the whole idea
>would still be in line with the general direction IBIS
>is going.
>
>The more I think of this, the more I like it...  Please
>comment.
>
>Thanks,
>
>Arpad
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