[SI-LIST] Re: MOS cap on chip for DECOUPLING

Bi Han wrote:
> 
> Hi, experts:
> 
> In CMOS technology, what's the difference between using MOS cap  as VCC 
> decoupling in three different ways?
> 
> 1.  NMOS --> gate to VCC, other three nodes to VSS (inversion)
> 
> 2. PMOS --> gate to VCC, other three nodes to VSS (accumulation)
> 
> 3. PMOS --> gate to vss, other three nodes to VCC ( inversion)
> 
> What's their difference in High frequency application such as high speed 
> limiting amplifier?
> 
> Thanks!
> 
> 
> ---------------------------------
I would like to add one more to it:

4. NMOS --> gate, drain and source to VCC, Bulk to VSS.

Thanks
Rajat
___________________________
RAJAT CHAUHAN
TI-Banglore
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