[SI-LIST] Re: MDDR Routing in Different impedance

Hello MR,
the size of the reflection caused by a mismatch going from 55 Ohms to 60 
Ohms is easy to calculate,

rho = (60-55)/(60+55) *100% = approx. 4%

That is not enough to cause double clocking, but if such a reflection 
(from an earlier transition) comes in at the receiver right at an edge it 
will cause an edge timing error roughly equal to 4% of the signal rise 
time. That assumes the driver is severely mismatched and thus re-reflects 
close to 100% of the 4% reflection. Since the polarity of the reflection 
depends on the polarity of the edge causing it (rising or falling), worst 
case you get jitter of roughly +/- 4% of your rise time. If signals bounce 
around on the line mutliple times, in the worst case several reflections 
can add up.

If that is a concern depends on many factors, here is a non-comprehensive 
list:

- exact line length fro discontinuities to receiver in relation to bit 
interval
- if driver provides termination and how well matched it is to the line 
impedance
- if there is only one such impedance discontinuity on your line, or 
several
- how fast is your rise time (faster rise time means less timing hit by 
the reflection)
- are there other features that have more effect, e.g. via stubs
- how high are your transmission losses (will dampen the reflected signals 
over time)

and so on...

As you can imagine, with such a multitude of possible influences there 
isn't a general "yes" or "no" answer, it really depends on your particular 
situation. (That is exactly what makes for an engineer's job security :-).

Wolfgang









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[SI-LIST] MDDR Routing in Different impedance






Dear Experts,
In our design, we are interfacing two MDDR (Clock=133MHz, Data 
Rate=266MHz)in daisy-chain topology.
We are using three inner layers for MDDR signal routing.

Due to stackup and trace width restriction, in two layers we are 
maintaining the single ended impedance as 60 Ohm and in another one layer 
we are getting only 55 Ohms.

So while switching the signal routing from one layer to another layer 
there will be impedance mismatch. The MDDR signal in one layer will see 60 
Ohm and in another layer it will see 55 Ohm.

Is it okay? or Will this impedance mismatch create any issue?

Looking forward your suggestions. Thanks in Avance.

Thanks and Regards
MR

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