[SI-LIST] Looking for SI position
- From: "Fabrizio" <fzanella@xxxxxxxxx>
- To: "SI List" <si-list@xxxxxxxxxxxxx>
- Date: Fri, 20 Sep 2002 14:37:24 -0400
Fabrizio Zanella
6 Tina Road
Milford MA 01757
(508) 478-7455
email: fzanella@xxxxxxxxx
OBJECTIVE: To obtain a position as a hardware design engineer in a growing
company which provides challenging projects.
QUALIFICATIONS
Thirteen years of experience in signal integrity analysis and hardware design
of high speed computer system architectures.
EMPLOYMENT
Dec. 1996-Present Signal Integrity Manager, EMC Corp.
Was first signal integrity (SI) engineer at EMC, developed a strong SI group.
Under my leadership, SI analysis became common practice in every design.
Provided guidance and feedback for group, evaluated results and developed long
term strategy. Performed SI analysis of computer nets, from driver to receiver,
using IBIS and SPICE models. Used Hspice for analysis of high frequency and
backplane nets and SpecctraQuest for the evaluation of on board nets. Designed
test boards to characterize backplane signals prior to production boards.
Analyzed 3.125Gbs serial I/O, using eye pattern, S-parameter and TDR
measurements. Responsible for creating electrically optimized stackups for all
boards. Key contributor to system architecture design.
Oct. 1989-Dec. 1996 Signal Integrity Engineer, Teradyne, Inc.
Support of customers on high speed backplane design. Wrote and presented signal
integrity papers at several conferences. Designed high speed boards and
connectors. Performed electromagnetic modeling of backplane interconnections
using Ansoft HFSS, developed spice models of high frequency transmission lines.
Spice simulation of computer and telecom systems, determining noise budgets,
optimizing layout of high speed signals.
Oct. 1986-Sep. 1989 RF Engineer, M/A-COM
Designed and tested coaxial, wave-guide and microstrip transmission line
microwave components at frequencies up to 30GHz.
EDUCATION
Northeastern University
1981-1986 Northeastern University B.S.E.E. Cum Laude
Courses: High Speed Digital Design, Electromagnetic Compatibility Engineering,
Electrical Performance of Electronic Packaging.
Also took several leadership classes at EMC.
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