[SI-LIST] Re: LDO Heat Dissipation with Vias

Shawn,

50x50 mm pour is not required, this size is given as an example where 
certain thermal resistance is achieved. If you are saying that achieving 23 
C/W of junction to ambient thermal resistance is important for you then I 
would recommend to consider using a heat sink or replacing this LDO with a 
switcher. In fact, there are very few cases where linear regulator is really 
required and/or makes sense on a 16 layer probably mostly digital board, 
especially a regulator of this size.

With regards to the question of soldering, vias do suck solder away, but I 
believe it is not a big problem for this kind of parts. Better to ask your 
assembler though...


=======================
Mikhail Matusov
Senior Hardware Design Engineer
Square Peg Communications
Tel.: +1 (613) 271-0044 ext.231
Fax: +1 (613) 271-3007
http://www.squarepeg.ca





----- Original Message ----- 
From: <STaylor5@xxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Sent: Wednesday, June 17, 2009 10:01 AM
Subject: [SI-LIST] LDO Heat Dissipation with Vias


> All,
>
> We have a TI LDO (TI1963A-25KKT) in a KTT package (9.65mm x 10.67mm 
> thermal pad), but we don't have the space on our (16 layer) board for the 
> required 50mm x 50mm copper pours on the top and bottom.  We're hoping to 
> use the internal GND planes to help dissipate the heat away from this 
> component, and have placed some vias *nearby* the LDO pad for this 
> purpose.
>
> Wondering if placing vias right in the ground pad under a chip of this 
> size is going to cause any issues with the soldering process?  Certainly 
> the contact with the ground planes in our stack is improved if the heat 
> can travel direct instead of only through the neighboring vias.
>
> Any experience/insights would be appreciated.
>
> Kind Regards,
>
> Shawn
>
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