[SI-LIST] Re: {==Junk_Mail==} ddr2 75ohms option

Canes,

Maybe you got old information. If you are available, please browse data
sheets of DIMMs from Micron website.
Recall my previous experiences, please double check the byte 22 of SPD for
PC2-5300/6400 (DDR2-667/800).
Actual ODT is 50 ohms not 75 ohms.

In detail, please contact your local Micron FAE.

Regards,

Cortex
 
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of starsilic@xxxxxxxxx
Sent: Tuesday, September 25, 2007 2:23 PM
To: si-list@xxxxxxxxxxxxx; npatel@xxxxxxxxxx
Subject: {==Junk_Mail==} [SI-LIST] ddr2 75ohms option

Hi, 
This is w.r.to the document titled,
"TN-47-19: DDR2 (Point-to-Point) Features and Functionality" from Micron.
I have a small doubt in the concept explained in the 
"Figure 3: DDR2 READs and WRITEs Using ODT (DDR2-667 speed)". 

Here the controller ODT is enabled for 75ohms during reads. I want to know
with the reduced drive option of controller (35~40ohms) how this 75ohms
(ODT) can terminate effectively 50ohm Transmission Line of traces.

P.S : 
I tried posting in micron website, but the server is down / some problem
in accepting queries. So I am trying here. Nevertheless, this may be
helpful to someone in the near future.
 
Thanks,
Canes


       
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