[SI-LIST] Job Opening at Intel Santa Clara, CA.

  Hi - we are looking to hire a senior signal / power integrity engineer here 
for Intel mobile platform design. 
   
  This position is based at our Santa Clara, CA site.  If interested, please 
forward your resume to me: chee.yee.chung@xxxxxxxxx or apply at the Intel 
online job site (Req/Posting # 512027, https://jobs.intel.com/jobs/jobs.iccw)
   
  Thanks,
  Chee Yee Chung
  408-765-4754
   
  More details below:
  Your responsibilities will include but not be limited to: 
  - Lead platform electrical designs and its associated processor and chipset 
packages 
  - Interfacing with die circuits, package layout, and board design engineers.
  - Develop predictive models for package and board electrical analysis, and 
verify design robustness. 
   
  Qualifications  
  You should possess a MSEE or PhD in Electrical Engineering with experience in 
the following areas: 
  - Knowledge of package and motherboard high speed electrical design practices.
  -  Good understanding in electrical circuits, transmission line, & EM fields.
  - Competent with 2D and 3D modeling and simulation tools 
  - familiar with physical layout in Allegro/APD.

                
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