[SI-LIST] Re: Jitter transfer vs. accumulation

{{{{{No.  Phase jitter is always accumulated regardless open-loop or
closed-loop.  Closing the loop does attenuate the phase error within the
bandwidth, but RMS RJ does not go to zero.  }}}}}

That is the heart of my original question. Absent of a nuclear blast, do =
you still have accumulated phase noise due to substrate or PLLVDD noise =
on your PLL ?
If you have the same amount of open loop phase noise due to the exact =
amount of substrate or PLLVDD noise AND a choice of narrow or wide loop =
bandwidth (assuming both have enough phase margin), which one do you =
think will have the higher attenuated RMS jitter ?=20
I happened to believe the narrower band PLL will have more jitter. So =
did Paul Gray and his student.
http://kabuki.eecs.berkeley.edu/~weigandt/papers/iscas94paper2/bkimfinal1=
.ps.gz=20

WHAT DO YOU THINK ?

Then the second part of the question is do you believe your incoming =
reference clock, which is surrounded by clean supply and clean layout, =
carries more RMS jitter potentially being TRANSFERRED than the =
ACCUMULATED RMS jitter in  your Tx/Rx PLL with tens of millions of =
transistors and hundreds of I/O switching around it ?

If you believe you worry more about your incoming reference clock jitter =
transfer, you NARROW your PLL bandwidth. If you believe you worry more =
about your accumulated jitter in your Tx/Rx PLL, you WIDEN your PLL =
bandwidth. Again, assuming both cases can maintain good phase margin.

These are simple questions and I am trying to get your answers instead =
of brushing it aside by saying it is "senseless arguing".

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