[SI-LIST] Re: Interconnection of Big endian device and Little endian device problem?

This isn't exactly a signal or power integrity issue.  DRAMs have long 
had byte level resolution which should eliminate big / little endian 
conflicts.  PPCs have been used with DRAMs back to EDO days without a 
problem.  The address labeling / mapping may look funny on your 
schematic.  Otherwise everything will should be fine.

Steve.
icer world wrote:
>     When use PPC(Big endian) to connect with  DDR2(Little endian),I don't 
> know how to deal with it?
> The Demo schematic deals it like interconnection of two Little endian 
> device,which puzzles me.
> Can anyone give me some suggestion?thanks!
>
>       
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