Aubrey, I don't think there was any recommendationin in that presentation to have 1/2 oz signal and 2 oz power plane on the other side. Did I missed anything ? -----Original Message----- From: Aubrey_Sparkman@xxxxxxxx To: Chris.Cheng@xxxxxxxxxxxx; si-list@xxxxxxxxxxxxx Sent: 2/22/2005 8:21 AM Subject: RE: [SI-LIST] Re: Intel Motherboard with DDR2 Chris, Jon said " balanced ***cores*** (S-S or plane-plane)" He did not say balanced stackups. Both must be considered in production. Severely unbalanced ***cores*** (such as one with a 2 oz reference plane on one side and a HALF oz signal layer on the other side) will warp like a potato chip suffer yield problems BEFORE it gets to the step where all the cores are combined. Aubrey Sparkman Enterprise Engineering Signal Integrity Team Dell, Inc. Aubrey_Sparkman@xxxxxxxx (512) 723-3592 ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: http://www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: http://www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu