[SI-LIST] Re: Info on Capacitive loading of devices

> We have an ASIC working at 133MHz. Depending on the 
> requirement, this device can use 1 - 4 memory devices. 
> The device timings are specified for a load of 4 x Cio 
> (capacitance of IO pins) always. 
> 
> Now the question is this. 
> 
> If i put only one memory device (based on one application),
> then can i put a  capacitor 3 x Cio value in the path so
> as to match the load and thus meet the timings?
 
If you attach capacitors, will it match the load and meet the data sheet
timings?  Probably not.

Even if you had four memory devices, the load is almost certainly not 4
x Cio unless your trace lengths were zero.

If the timings are specified with Cload = 4 x Cio only, then any real
situation will differ.  This is something that we all deal with much of
the time.  One way to handle it, is to simulate the ASIC driving the
specified load (4 x Cio) and driving the actual load, and find their
difference.

> If i am putting all four memory devices, what is the best  
> termination technology? The device has bidirectional pins. 
> Can i split the tracks into four and put 10 ohms and then 
> drive the four devices? 
 
This is best determined by simulation and depends on many things.  Or if
the vendor provides design guidelines, you can save yourself some work
and follow their rules.

Andy



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