[SI-LIST] Re: Impedance matching with CPW
- From: Martyn Gaudion <martyn.gaudion@xxxxxxxxxxxxxxxxxxxx>
- To: "'kschoi@xxxxxxxxxx'" <kschoi@xxxxxxxxxx>, si-list@xxxxxxxxxxxxx
- Date: Mon, 24 Feb 2003 21:13:50 +0000
Hello Kwang-Seong Choi,
After taking into account the theory, it is also
worth taking into account the fabrication process.
Depending on the soldermask process in use with
your fabricator, the coating thickness may have
significant effect on the finished impedance.
A curtain coat process may fill the gap in the
CPW structure where the field is at its strongest
giving an Er between the trace and ground of ~3.6
and a spray coat process could yield a very thin
coat leaving mostly air Er ~1.0 between the traces.
This process variation could ultimately result
in several ohms difference between predicted
and actual impedance.
Best advice is to discuss this with your chosen
fabricator. And take this into account when you
are modelling.
Kind regards
Martyn Gaudion
www.polarinstruments.com
Controlled Impedance application notes:
www.polarinstruments.com/support/cits/cits_index.html
>-----Original Message-----
>From: kschoi@xxxxxxxxxx [mailto:kschoi@xxxxxxxxxx]
>Sent: Monday, February 24, 2003 3:39 AM
>To: si-list@xxxxxxxxxxxxx
>Subject: [SI-LIST] Impedance matching with CPW
>
>
>Dear Experts;
>
>I design CPW pattern for the impedance matching with a given load. I think
>that unlike microstrip line,
>there is no closed form equation decribing CPW so that the simulator such
>as 2.5 D simulator may be only
>solution for the impednace matching, which needs much time and know-how.
>
>Is there general rule of thumb in designing the CPW for the purpose descibe
>above? I searched reference book
>and paper but so far I cannot find it.
>
>Thanks...
>
>Kwang-Seong Choi
>
>
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- References:
- [SI-LIST] Re: Impedance matching with CPW
- From: Grossman, Brett
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