[SI-LIST] Re: IBIS simulation LVPECL

Bob,
what is the nature of your 'receiver?' If it is a big uP chip the 150 ps
internal prop delay can cause a step in the signal at the pin.

    Dave Cuthbert

On Fri, Oct 3, 2008 at 8:42 AM, Bob Tarasewicz <Bob.Tarasewicz@xxxxxxxxxx>wrote:

> My simulations of an LVPECL net (apprx 3" long, 'Y' terminated just beyond
> receiver) do not seem to be correlating at all with in-lab measurements.
> In the past I've had very good luck with simulations agreeing pretty well
> with actual scope measurements; however, this is my first experience
> simulating LVPECL.  Is there a fundamental reason why perhaps IBIS models
> won't model the behavior of LVPECL accurately?  Or is it that the faster
> edge rate of LVPECL is highlighting flaws/limitiations in my simulation
> methodolgy and/or tool?
> Simulations "at the pin" as well as "at the die" show nice rising/falling
> edges at the receiver.  However, scope captures with a good diff probe
> show a 'step' in the rising/falling edge at the receiver.  The 'step'
> looks like what one would expect halfway down a series-terminated net; not
> sure why I'm seeing a 'step' with an end-terminated net.
>
> Any guidance would be apprecitated.
>
> Bob Tarasewicz
>
>
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