[SI-LIST] Re: I2C Noise

Chris, from your description, it does sound like you are suffering from 
crosstalk.  I2C devices are supposed to debounce both SCL and SDA in the 
100KHz mode, and so even with a lot of crosstalk, you should not have seen 
errors.  Unfortunately, there is a lot of silicon that violates the spec.
Regards,


Steve
At 03:24 PM 5/21/2004 -0700, Christopher Jakubiec wrote:
>Steve,
>
>Thanks for your insight.  Yes, I meant to state 100kHz instead of 100mHz.
>
>I think that we might be dealing with item 2 (noise
>coupling) as you described below.  We have 3 AC/DC power supplies that each
>operate on dual power grids for redundancy purposes.  Each power supply has 2
>sets of I2C wires connected to it, one for each power grid.  I believe 
>that each
>set consists of SCL, SDA, VDD, VSS.  At one point in the system all 6 sets 
>of I2C
>wires are bundled together.
>
>On a system that was failing fairly consistently, we
>went in and seperated the cumulative bundle into individual sets by 
>physical distance.
>We have not seen the failure replicate since.  I don't believe that the 
>orginal wire
>routing included any special shielding.  I can confirm with a digital 
>scope per your
>suggestion.
>
>-Chris
>
>
>steve weir wrote:
> >
> > Chris,
> >
> > I2C is a very high impedance bus, typically 4700 ohms pull-up.  I think you
> > mean 100Kbps, the legacy mode.  It is easy to mess I2C up with grounding
> > issues.  The states that you are referring to are probably being conveyed
> > via IPMB over I2C or similar.  There are several things that can go wrong:
> >
> > 1) Incorrect grounding is fouling basic I2C signaling.
> > 2) Noise coupling is fouling I2C signaling.
> > 3) Voltage translation issues.  The original I2C bus was 5V TTL.  Mixed
> > voltages can also cause grief, as can hot swap.
> >
> > Check 1 and 2 with any of the many I2C analyzers available, or just put a
> > scope on the SCL line in infinite persistance.
> >
> > 4) An aberrant device is violating I2C bus negotiation contending with the
> > actual master and fouling SCL, SDA or both..
> >
> > 5) Your misbehaving peripheral is a poor implementation of I2C and/or
> > whatever protocol you may be running on top of it.  Some devices do not
> > implement the timing as per the spec.  This can be particularly true of
> > microcontrollers that do not include dedicated I2C hardware.  But even a
> > number that do violate the specs, or rely on careful programming to comply.
> >
> > I would start by looking at the SCL line with a decent digital scope
> > first.  If you don't find your problem there it is time to look for mixed
> > voltage and/or hot-swap issues.  If you get all that worked out, then I
> > would move up to the link layer and see if you are a victim of some bad
> > firmware.
> >
> > Regards,
> >
> > Steve
> >
> > At 02:04 PM 5/21/2004 -0700, Christopher Jakubiec wrote:
> > >All,
> > >
> > >Has anyone encountered problems with EMI/noise issues on I2C wires and/or
> > >busses?  We use industry standard I2C to interface with our bulk 208V/48V
> > >AC/DC power supplies.  We are observing instances where control and status
> > >signals (connected via I2C) for the AC/DC power supplies appear to be
> > >intermittently
> > >in the wrong state.  I believe that we are currently running the I2C clock
> > >signal at
> > >100MHz, and our wire lengths are significant on the order of 2-3ft.
> > >
> > >Thanks,
> > >
> > >Chris Jakubiec
> > >Sun Microsystems
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