[SI-LIST] Re: I need to compensate for component with too high an input capacitance.

Hi Tom,
I don't know your design specifics.  Sometimes people put AC coupling caps 
in device application
notes assuming the signal will go off the board.  But if the signal stays 
on the board, and the
dc levels of the signal driver and receiver are met, then the AC coupling 
cap can be left out;  the
signals can be connected directly.  I have no idea if this is the case for 
your design, but I have seen
similar extra caps in signal paths, so I thought it worth mentioning.

good luck with your design,
Stephanie

si-list-bounce@xxxxxxxxxxxxx wrote on 03/19/2006 05:12:10 PM:

> Hi,
> 
> I have designed a component into my system that does not behave as 
> advertised. The input capacitance of the part, as I am told by the 
> manufacturer, is far higher than was listed in the specification. 
> They now claim that it is around 6 pF instead of 2 pF. This, they 
> claim, is why driver with an 80 ps rising edge causes 
> such "excessive ringing" on the input. 
> 
> There are no alternative parts on the market that are common mode 
> compatible with all of the components in the signal chain. Because 
> of the density of this system, in terms of layout, I need to use 
> LVDS or CML parts with internal differential terminations (source 
> and load). Also, I am running at 1.5 Gb/s, so the parts need to have 
> both high bandwidth and low input capacitance.
> 
> The only other part on the market that might do the job needs to 
> have a  10 uF AC coupling cap in the signal path and I can not 
> afford the space in the layout nor the extra AC coupling due to 
> bandwidth issues (we also need to pass lower BW signals).
> 
> My best option, I feel, is to somehow soften the rising edge of the 
> signal so as to reduce the ringing on the input to the troublesome 
> component. 
> 
> How best to do this? I have done some spice analysis on a circuit 
> that is known as the "constant resistance termination". I read about 
> this at the Dr. Howard Johnson website. I even have the original 
> book by Bode that describes it (although Bode did not use the same 
> name for it). One leg of this termination is inductive and one leg 
> is capacitive. The idea is that overall impedance of the termination 
> remains constant during the rising/falling edge transition but the 
> effect is to soften the edges. This works good in Spice. One 
> resistor is placed in series with the input capacitance of the 
> device and there is another leg, with an inductor and resistor, 
> placed from the far end of the resistor to ground.
> 
> However, this involves the use of three extra components for each 
> leg of the differential pair. It would require 2 resistors and and 
> inductor, calculated to be in the neighborhood of 7 pH. For a signal 
> pair this is 6 new components at the receiving end.
> 
> Even if I eliminated one leg of the differential pair for short 
> distances, layout space is still an issue (3 extra components). For 
> the constant resistance termination I could use 402 size resistors 
> but the Inductor is still a problem. 
> 
> 1) For the constant resistance termination, how do you all feel 
> about using spiral wound Inductors in a PCB? I, personally, have no 
> experience with them.
> 
> 2) What other options are out there for an inductance? I thought of 
> using a Ferrite chip but their reactance curves are not linear. I 
> suppose that I could "tune" the design until I got to something 
> close....
> 
> 3) Is there an all together differenct aproach that I have not 
> thought of?
> 
> I would love some input from the group. I am sure that someone out 
> there has faced similar difficulties.
> 
> Tom
> tom_cip_11551@xxxxxxxxxxx
> 
> 
> 
> 
> 
> 
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