[SI-LIST] Re: How to measure the On Die decupling capacitor value ?

You may find the following paper, presented at DesignCon 2010, and its 
references, useful:

"On-Chip PDN Noise Characterization and Modeling" by
Shishuang Sun, Member of Technical Staff Engineer, Altera Corporation
Larry D. Smith, Signal and Power Integrity Architect, Altera Corporation
Peter Boyle, Product Engineering Manager, Altera Corporation

Regards,

Istvan Novak
Oracle


On 9/10/2010 10:15 PM, yardala wrote:
> Hi, All
> Can I measure the value of On Die Decoupling capacitor use only capacitor
> meter
> probing at  pin Vdd and Vss ?
>
> When I use meter to measure the value of core logic are few nH and unstable,
> the value of I/O power are several hundred pF.
>
> Does these value make sense ? does it good enough , or any other methods are
> suggest ?
>
> Does the bonding wire effect the capacitor value ?
>
> Thanks!
>
> Yardala
>
>
>

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