[SI-LIST] Re: How good is enough(Power Integrity)

Zhangkun - Your question really boils down to the level of quality and
reliability required for your product.  It is easy to calculate a
target impedance for your power distribution system.  It is simply the
allowed noise voltage (Vdd*tolerance) divided by the transient current
drawn from the PDS.  It may be difficult to get an accurate estimation
of the transient current, but once you do, it is simply Ohm's law.  If
you combine the PDS components together in a way that meets the target
impedance at all important frequencies (easily verified with a VNA),
then your system is guaranteed to stay within the voltage tolerance
specified.  

However, the converse is not true.  If your system does not meet
target impedance, it is not guaranteed to fail.  I have seen plenty of
products, that did not meet target impedance, make money all the way
to the bank.  I've also seen products that work perfectly until a
customer tried to run a certain code.  His code just happened to cause
current to be drawn from the PDS at an impedance peak and a particular
class of machines would fail (crash) every time his code was run.  But
all the other customers were happy!  I've also seen machines that run
fine by themselves but peripheral cards that were plugged into them
never seemed to work, even though they worked fine in other machines
with more robust PDS's. 

Some products crash a lot for other reasons and customers just utter a
few words and reboot.  Other products cause significant revenue loss
and business down time when they crash.  So the answer to your
question, "how good is good enough?" really depends upon the quality
and reliability levels that you are trying to obtain.  This is why I
like to call it a target impedance.  You don't necessarily have to hit
the target.  If you are above target, you are at risk.  If you are
below target, you are probably spending too much on your PDS.  The
target impedance simply gives you a reference point to shoot for. 
Every board designer must answer the target impedance question for his
own line of products.

regards,
Larry Smith
Sun Microsystems

zhangkun 29902 wrote:
> 
> Dear steve
> 
> I do not express myself clear. What I want to say is that for different 
> chips, the request of decoupling are not same. For SDRAM, the impedance of 
> PDS could be large and for other chips, the impedance of PDS should be very 
> small to make the system work well.
> 
> I want to know how to check whether the impedance of PDS is small enough or 
> not.
> 
> Best Regards
> 
> Zhangkun
> 2004.4.23
> 
> ----- Original Message -----
> From: steve weir <weirsp@xxxxxxxxxx>
> Date: Friday, April 23, 2004 3:13 pm
> Subject: Re: [SI-LIST] How good is enough(Power Integrity)
> 
> > Zhangkun, there are a whole lot of people who would take exception
> > to the
> > idea that SDRAM works well without decoupling.  I suggest that if
> > you
> > perform a stress test that charges alternate columns in an entire
> > row to
> > all 1's, and then write all 0's to one half of the columns that
> > w/o
> > external decoupling capacitors you will see bit errors in the
> > unwritten
> > columns.  A starting point for power integrity is to assign a
> > specific AC
> > noise voltage to the overall supply voltage tolerance budget, and
> > then
> > divide that by the AC current versus frequency to obtain an
> > impedance
> > versus frequency specification.
> >
> > Regards,
> >
> >
> > Steve.
> > At 02:00 PM 4/23/2004 +0800, zhangkun 29902 wrote:
> > >Dear All
> > >
> > >How good is enough in power integrity analysis at PCB level?
> > >
> > >In my experience, for some kind of general chip such as SDRAM,
> > even there
> > >is no decoupling caps for SDRAM, they will work well. However,
> > for some
> > >chips, the power ground noise is very critical.
> > >
> > >In signal integrity, there are plenty of model to simulate. In
> > power
> > >integrity, how to do?
> > >
> > >Any advice will be prefered.
> > >
> > >Best Regards
> > >
> > >Zhangkun
> > >2004.4.23
> > >
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