[SI-LIST] Re: High speed signal on top layer
- From: steve weir <weirsi@xxxxxxxxxx>
- To: george_dai@xxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Mon, 30 May 2005 13:49:43 -0700
George,
1. Possible, but there are several pitfalls, including control over
plate-up and solder mask. Capping could help with those.
2.The signal and return paths need to be contiguous through the entire
channel. Most likely, you will not be able to meet that condition through
your connectors using either +12V or +5V as the back plane image
planes. At 3Gbps, I strongly advise only using logic ground as the return,
and managing that carefully.
At 3Gbps you are getting to the point where a number of second order
factors become very important. If engineered with care, such links will
perform flawlessly. If not, they will be erratic or not work at all.
Steve.
At 07:48 PM 5/30/2005 +0800, George Dai wrote:
>Hi all,
>
>We are layout one 3.0Gbps high speed backplane. The original design style
>is routing the edge coupling differential signals in the internal layer,
>with adjacent GND plane. Now we met the layer limitation, and here is the
>questions,
>1. Can we routing the differential pair on the top layer with GND plane
>on the second layer? In my knowledge, it seems functional but odd.
>Please give your advice.
>2. Can we use one continuous power plane (12v or 5v) as the reference
>plane to the high speed signals? For example, if 3.0Gbps signals on top
>layer works, can the second layer be +12v power plane?
>
>Thanks in advance,
>Best Regards,
>George
>USI Shanghai RD Center
>
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