[SI-LIST] Re: HSpice IBIS Input/Output Buffer syntax

Refer to the figures in the HSpice manual.  The node that has C_comp on it
is always the "business end" of the model, the node that you want to connect
to the rest of your circuit being simulated.  HSpice does unfortunately play
games with the nodenames it uses in its documentation, using "nd_in" to mean
one thing on input buffers and something else on output buffers; try to
ignore that.  You don't need to use their choice of nodenames.

nd_en is the "enable" function.  You must drive it with a 0V or 1V voltage
source to enable or disable the output side of the I/O buffer.  The polarity
of the signal you apply to this node depends on the Enable parameter in the
IBIS model itself.  In the IBIS model, if Enable is "Active-High", then the
I/O buffer drives out when nd_en is 1 (>0.5V), and tri-stated when nd_en is
0 (<0.5V).

Don't forget to include ALL nodes when you instantiate your IBIS element,
even optional ones.  If you omit the optional ones, you will find that the
IBIS model's clamps are missing when the buffer is used as an input!

Andy

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