[SI-LIST] Re: HSPICE and Via Modeling
- From: "Hargin, Bill" <bill_hargin@xxxxxxxxxx>
- To: <david.lieby@xxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Mon, 18 Jul 2005 15:50:04 -0700
Hi Dave:
HyperLynx GHz can provide the parasitic capacitance, inductance, and
delay of your via ... Do you have access to a HyperLynx GHz license?
Bill Hargin
Product Manager - HyperLynx
Mentor Graphics Corp.
425-497-5079 - Direct
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx=20
> [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of dav0
> Sent: Monday, July 18, 2005 11:28 AM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] HSPICE and Via Modeling
>=20
> I have an engineer who wants a detailed model of a via.
> Mostly he is looking for capacitance. The part of the system=20
> he is working on runs at less than 5 MHz. The via is blind,=20
> with the closed end of the via ending fairly close to a ground plane.
>=20
>=20
>=20
> __ __ Top Pad
> ________ ][ _____ Reference layer
> ][
> ---------][----- routing layer 1
> ---------][----- routing layer 2
> ________ ][ _____ Reference layer
> ][
> ---------][----- routing layer 3
> ---------][----- routing layer 4
> ________ ][ _____ Reference layer
> ][
> ---------][----- routing layer 5
> ---------][----- routing layer 6
> __][__ Bottom pad, end of via
> _________________ Reference layer, at center of stackup
>=20
> the same stackup reversed.
>=20
> My questions:
> 1. Can one analyze this in HSPICE?
> 2. Does anyone have a spice deck with anywhere near
> a starting point, that they can share.
>=20
> The vendor support engineer could not come up with anything helpful.
>=20
> Thanks,
> dav0
> David Lieby
> Siemens Medical, USD, MVIS-S
>=20
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