[SI-LIST] Re: HSPICE Vs. IBIS models

  • From: "Lynne D. Green" <lgreen22@xxxxxxxxxxxxxx>
  • To: "'si-list@xxxxxxxxxxxxx'" <si-list@xxxxxxxxxxxxx>
  • Date: 22 Jan 2004 16:05:05 -0800

If time is adjusted (removed or added) in any V-t table, then it is
often necessary to make the same adjustment to all tables to preserve
relative timing of turn-on and turn-off effects.

As an example, sometimes a SPICE simulation is done with an inverter
chain ahead of the buffer to shape the input waveform.  The delay of the
inverter chain is not part of the buffer delay, but it is probably the
same for both rising and falling waveforms.

- Lynne

-- 
Lynne D. Green <lgreen22@xxxxxxxxxxxxxx>

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