[SI-LIST] HSPICE IBIS simulation of MPC948 clock driver has non-monotonic waveform: help please

I am simulating series terminated clock driver
using Motorola MPC948 IBIS model (June 17, 1998,
latest one available on their web site), and HSPICE
version 2001.4.

I am getting what appears to be unreasonable
non-monotonic behavior with long line and high
frequency (reflected signal returns during next
driver transition).  
To help me understand whether problem
is with model, simulation, or circuit I simulated
pure resistive loads:
MPC948 driving 100 Ohms to 0V, 100 Ohms to Vdd,
and 50 Ohms to Vdd/2.  It appears that for a
L to H transition of the output, the output goes
to high impedance for about 3ns, then pulls high.
(with load of 100 Ohms to Vdd, the output goes high
almost immediately, with 100 Ohms to 0V the output
stays low for about 3ns, and with 50 Ohms to Vdd/2
the output goes to Vdd/2 for about 3ns, then to Vdd.

Similar (symmetric) behavior in H to L direction.
This seems completely unreasonable and a fault with
the model or IBIS (or my understanding and use).

My non-monotonic waveforms can be explained by the 
driver being high-impedance (as it appears from the 
simulations using resistive loads) when the reflection from
receiving end returns.

Does anyone have a few words of wisdom here to help
me understand?

Regards,

Fred


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