[SI-LIST] Re: HIGH DC Current on GND Plane
- From: Istvan Novak <istvan.novak@xxxxxxxxxxx>
- To: Vinu Arumugham <vinu@xxxxxxxxx>
- Date: Wed, 20 Jun 2007 20:13:14 -0400
Vinu,
If you have a well-positioned return via for each signal transition, you
dont need to worry about PDS interacting with your signals. The effect
of PDS on signal transmission might be measurable in that case, but
small enough to ignore. If for any reason the signal vias do not have
'matching' return vias, the resonances in the PDS impedance profile will
show up in the S21 of the signal vias. A good paper to show this effect
was at DesignCon 2007, paper 6-TA3, "Developing a physical model for
vias - part II: coupled and ground return vias". In the absence of
close-by return vias the PDS impedance profile should be resonance-free
in the signaling bandwidth. Having a large-size board actually helps,
because the dominant resonance frequencies of a full-size plane would be
below the lower bandwidth edge of the coded signal.
Regards,
Istvan Novak
SUN Microsystems
Vinu Arumugham wrote:
> Istvan,
>
> We use through vias on serdes signals that go through power
> distribution plane pairs. But we also use ground return vias for these
> signals and have not seen the need for high-speed PDS design
> techniques for backplane power thus far.
>
> Thanks,
> Vinu
>
> Istvan Novak wrote:
>
>> Vinu,
>>
>> Yes, if the SerDes signals are sandwitched between ground layers, you
>> are safer. However, if you use through vias, which go through the
>> power distribution plane pairs, there is still some chance that noise
>> from the power rails couples to the signals, so in that case proper
>> bypassing is still important.
>> Regards,
>> Istvan
>>
>>
>> Vinu Arumugham wrote:
>>
>>> Istvan,
>>> I think your comments apply to serdes signals routed as stripline
>>> traces that are referenced to both a power plane and a ground plane.
>>>
>>> If the traces are routed referencing only ground planes and these
>>> ground planes also serve as power return, I think the serdes signals
>>> will be unaffected.
>>>
>>> Do you agree?
>>>
>>> Thanks,
>>> Vinu
>>>
>>> istvan novak wrote:
>>>
>>>
>>>> Hi Joe,
>>>>
>>>> There are the following generic guidelines that come to my mind,
>>>> not knowing the
>>>> details of the system:
>>>> - if the 60A power rail serves also as reference for SerDes lines,
>>>> it has to be quited sufficiently
>>>> for that purpose, which means that you need to design that rail as
>>>> a high-speed power rail.
>>>> This is especially true if you also need to carry reference clock
>>>> or sensitive low-level analog
>>>> signals around the backplane. - if you have switching regulators
>>>> connected to this rail (most probably you have), either
>>>> feeding this rail with raw power or taking this voltage to generate
>>>> local sypply voltages,
>>>> you want to check very carefully for high-frequency ringing
>>>> generated by the converters.
>>>> Today the ringing can be anywhere in the 50-500MHz frequency range;
>>>> if they spread
>>>> freely on the power rail, it will reduce your SerDes margin.
>>>> Unfortunately the ringing
>>>> is not limited by converter specifications (in other words there is
>>>> no spec item for the
>>>> potential high-frequency ringing).
>>>> - as others pointed out, you dont need to worry about saturation of
>>>> copper, unless you
>>>> have local features increasing the current density too much. Make
>>>> sure you use the
>>>> largest area that you can afford and many vias for connecting the
>>>> high-current inputs
>>>> and outputs.
>>>>
>>>> Regards,
>>>>
>>>> Istvan Novak
>>>> SUN Microsystems
>>>>
>>>> Joe Paul M wrote:
>>>>
>>>>
>>>>
>>>>
>>>>> I have a midplane carrying 60Amps of current and Same GND plane is
>>>>> used as reference for multiple of 6.6 Ghz serdes lines , PCI-e
>>>>> lines and GE lines
>>>>> Is there anything similar to 'saturation' in Inductors applicable
>>>>> to GND plane?
>>>>> ( Due to saturation of flux in the flux carrying medium , beyond a
>>>>> certain amount of DC current inductors saturate and wont act as
>>>>> inductors for any AC superimposed on the DC. )
>>>>> Will cross talk increase due to the absence of mutual inductance
>>>>> between signals and gnd plane ?
>>>>> Is there anything else that can go wrong due to this DC , AC
>>>>> current mixing in planes ??
>>>>>
>>>>>
>>>>>
>>>>>
>>>>>
>>>>>
>>>>>
>>>>
>>
>
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- References:
- [SI-LIST] HIGH DC Current on GND Plane
- From: Joe Paul M
- [SI-LIST] Re: HIGH DC Current on GND Plane
- From: istvan novak
- [SI-LIST] Re: HIGH DC Current on GND Plane
- From: Vinu Arumugham
- [SI-LIST] Re: HIGH DC Current on GND Plane
- From: Istvan Novak
- [SI-LIST] Re: HIGH DC Current on GND Plane
- From: Vinu Arumugham
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- » [SI-LIST] Re: HIGH DC Current on GND Plane
- » [SI-LIST] Re: HIGH DC Current on GND Plane
- [SI-LIST] HIGH DC Current on GND Plane
- From: Joe Paul M
- [SI-LIST] Re: HIGH DC Current on GND Plane
- From: istvan novak
- [SI-LIST] Re: HIGH DC Current on GND Plane
- From: Vinu Arumugham
- [SI-LIST] Re: HIGH DC Current on GND Plane
- From: Istvan Novak
- [SI-LIST] Re: HIGH DC Current on GND Plane
- From: Vinu Arumugham