[SI-LIST] Guidlines required for high speed PCB design

Dear all,
 
I have been tasked with providing some guidance with regard to routing
high speed differential signals to/from our SerDes device. The device is
packaged in 81 ball BGA package. 
The device can be used in 300pin 10Gbps Optical Transponder module
applications and also for use on line cards. I have designed high speed
boards for SerDes parts and also designed
boards for high speed 10Gbps serial parts, so I do have some
understanding of the signal integrity issues that should be considered.
However, I have not used BGA packaged parts and had to consider escape
routing of signals from inner rows of such packages. The parallel data
to/from the SerDes part are differential LVDS running at rates up-to
1.25Gbps. I need to obtain a better understanding of the following
issues to understand whether the ball assignments will create Signal
Integrity issues relating to routing of the differential bus. Can anyone
provide feedback or sources of reference for investigation into the
following:-
 
*         Common layer stack/material selection used for Transponder
module board / Line card designs.
*         Common strategies for escape routing of differential signals
from BGA packages.
*         Feedback on types of impedance controlled structures commonly
used to reduce layer count and increase density
*         Routing schemes for minimizing crosstalk between pairs 
*         Guidelines for BGA ball-out assignments to support ease of
routing and to maintain signal integrity
 
At this stage in the design process, I am able to provide feedback to
the design team to enable optimized ball out for both signal integrity
and for routing. I have read some interesting application notes from a
number of sources, incl Altera & Zilinx relating to high speed board
layout using BGA packages - these provided useful information. I would
like to pursue these subject area's further and would really appreciate
some feedback.
 
Best Regards
 
 
Iain Lochhead
Design Validation & Test Engineering Manager
Phyworks Ltd
 


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